EDB8164B4PR-1DITF-R datasheet(112/152 Pages) MICRON

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AC and DC Logic Input Measurement Levels for Differential Signals

Figure 72: Differential AC Swing Time and tDVAC

tDVAC

1/2 cycle

Time

IH,diff(AC)min

IH,diff(DC)min

0.0

IL,diff(DC)max

IL,diff(AC)max

CK_t, CK_c

DQS_t, DQS_c

Table 71: Differential AC and DC Input Levels

For CK_t and CK_c, VREF = VREFCA(DC); For DQS_t and DQS_c VREF = VREFDQ(DC)

Symbol

Parameter

LPDDR2-1066 to LPDDR2-466

LPDDR2-400 to LPDDR2-200

Unit Notes

Min

Max

Min

Max

VIH,diff(AC)

Differential input

HIGH AC

2 × (VIH(AC) - VREF)

Note 1

2 × (VIH(AC) - VREF)

Note 1

VIL,diff(AC)

Differential input

LOW AC

Note 1

2 × (VIL(AC) - VREF)

Note 1

2 × (VIL(AC) - VREF)V

VIH,diff(DC)

Differential input

HIGH

2 × (VIH(DC) - VREF)

Note 1

2 × (VIH(DC) - VREF)

Note 1

VIL,diff(DC)

Differential input

LOW

Note 1

2 × (VIL(DC) - VREF)

Note 1

2 × (VIL(DC) - VREF)V

Notes:

1. These values are not defined, however the single-ended signals CK_t, CK_c, DQS_t, and

DQS_c must be within the respective limits (VIH(DC)max, VIL(DC)min) for single-ended signals

and must comply with the specified limitations for overshoot and undershoot (see Over-

shoot and Undershoot Definitions).

216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM

AC and DC Logic Input Measurement Levels for Differential

Signals

09005aef85eb530a

216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN

112

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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