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XIO2000 数据表(PDF) 144 Page - Texas Instruments

部件名 XIO2000
功能描述  XIO2000 PCI Express to PCI Bus Translation Bridge
PDF  150 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

XIO2000 数据表(HTML) 144 Page - Texas Instruments

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Electrical Characteristics
132
November 2005
SCPS097B
7.10 PCI Bus Parameter Measurement Information
† CLOAD includes the typical load-circuit distributed capacitance.
CLOAD
Test
Point
Timing
Input
(see Note A )
Out-of-Phase
Output
tpd
50% VDD
50% VDD
VDD
0 V
0 V
0 V
0 V
0 V
VOL
th
tsu
VOH
VOH
VOL
High-Level
Input
Low-Level
Input
tw
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
LOAD CIRCUIT
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
tpd
tpd
tpd
VLOAD
IOH
IOL
From Output
Under Test
90% VDD
10% VDD
tf
tr
Output
Control
(low-level
enabling)
Waveform 1
(see Note B)
Waveform 2
(see Note B)
VOL
VOH
VOH − 0.3 V
tPZL
tPZH
tPLZ
tPHZ
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
VOL + 0.3 V
0 V
0 V
≈ 50% VDD
≈ 50% VDD
ten
tdis
tpd
tPZH
tPZL
tPHZ
tPLZ
CLOAD†
(pF)
IOL
(mA)
TIMING
PARAMETER
30/50
12
−12
0
3
1.5
30/50
12
12
−12
−12
LOAD CIRCUIT PARAMETERS
= 50
Ω, where VOL = 0.6 V, IOL = 12 mA
IOL
30/50
‡ VLOAD −VOL
IOH
(mA)
VLOAD
(V)
Data
Input
In-Phase
Output
Input
(see Note A)
VDD
VDD
VDD
50% VDD
50% VDD
50% VDD
50% VDD
VDD
VDD
50% VDD
50% VDD
50% VDD
50% VDD
VDD
50% VDD
50% VDD
50% VDD
50% VDD
50% VDD
50% VDD
NOTES: A. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by pulse generators having the
following characteristics: PRR = 1 MHz, ZO = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. For tPLZ and tPHZ, VOL and VOH are measured values.
50% VDD
Figure 7−1. Load Circuit And Voltage Waveforms



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