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LSM6DSTX 数据表(PDF) 46 Page - STMicroelectronics |
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LSM6DSTX 数据表(HTML) 46 Page - STMicroelectronics |
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46 / 175 page  8 Register mapping The table below provides a list of the 8/16-bit registers embedded in the device and the corresponding addresses. All these registers are accessible from the primary SPI/I²C/MIPI I3CSM interface only. Table 21. Registers address map Name Type Register address Default Comment Hex Binary FUNC_CFG_ACCESS RW 01 00000001 00000000 PIN_CTRL RW 02 00000010 00111111 RESERVED - 03-06 FIFO_CTRL1 RW 07 00000111 00000000 FIFO_CTRL2 RW 08 00001000 00000000 FIFO_CTRL3 RW 09 00001001 00000000 FIFO_CTRL4 RW 0A 00001010 00000000 COUNTER_BDR_REG1 RW 0B 00001011 00000000 COUNTER_BDR_REG2 RW 0C 00001100 00000000 INT1_CTRL RW 0D 00001101 00000000 INT2_CTRL RW 0E 00001110 00000000 WHO_AM_I R 0F 00001111 01101101 R (SPI2) CTRL1_XL RW 10 00010000 00000000 R (SPI2) CTRL2_G RW 11 00010001 00000000 R (SPI2) CTRL3_C RW 12 00010010 00000100 R (SPI2) CTRL4_C RW 13 00010011 00000000 R (SPI2) CTRL5_C RW 14 00010100 00000000 R (SPI2) CTRL6_C RW 15 00010101 00000000 R (SPI2) CTRL7_G RW 16 00010110 00000000 R (SPI2) CTRL8_XL RW 17 0001 0111 00000000 R (SPI2) CTRL9_XL RW 18 00011000 11100000 R (SPI2) CTRL10_C RW 19 00011001 00000000 R (SPI2) ALL_INT_SRC R 1A 00011010 output WAKE_UP_SRC R 1B 00011011 output TAP_SRC R 1C 00011100 output D6D_SRC R 1D 00011101 output STATUS_REG R 1E 00011110 output RESERVED - 1F OUT_TEMP_L R 20 00100000 output OUT_TEMP_H R 21 00100001 output OUTX_L_G R 22 00100010 output OUTX_H_G R 23 00100011 output OUTY_L_G R 24 00100100 output OUTY_H_G R 25 00100101 output LSM6DSTX Register mapping DS14039 - Rev 1 page 46/175 |
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