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LSM6DSTX 数据表(PDF) 83 Page - STMicroelectronics

部件名 LSM6DSTX
功能描述  iNEMO inertial module: always-on 3-axis accelerometer and 3-axis gyroscope with embedded machine learning core
PDF  175 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

LSM6DSTX 数据表(HTML) 83 Page - STMicroelectronics

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9.59
I3C_BUS_AVB (62h)
I3C_BUS_AVB register (R/W)
Table 159. I3C_BUS_AVB register
0 (1)
IBI_RST_
ACK
0(1)
I3C_Bus_Avb
_Sel1
I3C_Bus_Avb
_Sel0
0(1)
0(1)
PD_DIS_
INT1
1. This bit must be set to 0 for the correct operation of the device.
Table 160. I3C_BUS_AVB register description
IBI_RST_ACK
When this bit is set to 1, the IBI is reset with master acknowledge.
When this bit is set to 0, the IBI is reset when the interrupt is served (reading output data or the
interrupt source registers).
I3C_Bus_Avb_Sel[1:0]
These bits are used to select the bus available time when the I3C IBI is used.
Default value: 00
(00: bus available time equal to 50 μsec (default);
01: bus available time equal to 2 μsec;
10: bus available time equal to 1 msec;
11: bus available time equal to 25 msec)
PD_DIS_INT1
This bit allows disabling the INT1 pull-down.
(0: pull-down on INT1 enabled (pull-down is effectively connected only when no interrupts are routed
to the INT1 pin or when I3C dynamic address is assigned);
1: pull-down on INT1 disabled (pull-down not connected)
9.60
INTERNAL_FREQ_FINE (63h)
Internal frequency register (R)
Table 161. INTERNAL_FREQ_FINE register
FREQ_
FINE_7
FREQ_
FINE_6
FREQ_
FINE_5
FREQ_
FINE_4
FREQ_
FINE_3
FREQ_
FINE_2
FREQ_
FINE_1
FREQ_
FINE_0
Table 162. INTERNAL_FREQ_FINE register description
FREQ_FINE_[7:0]
Difference in percentage of the effective ODR (and timestamp rate) with respect to the typical.
Step: 0.15%. 8-bit format, two's complement.
LSM6DSTX
I3C_BUS_AVB (62h)
DS14039 - Rev 1
page 83/175



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