LSM6DSTX datasheet(51/175 Pages) STMICROELECTRONICS

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9.4

FIFO_CTRL2 (08h)

FIFO control register 2 (R/W)

Table 28. FIFO_CTRL2 register

STOP_ON_

WTM

FIFO_COMPR

_RT_EN

0(1)

ODRCHG_EN

0(1)

UNCOPTR_

RATE_1

UNCOPTR_

RATE_0

WTM8

1. This bit must be set to 0 for the correct operation of the device.

Table 29. FIFO_CTRL2 register description

STOP_ON_ WTM

Sensing chain FIFO stop values memorization at threshold level

(0: FIFO depth is not limited (default);

1: FIFO depth is limited to threshold level, defined in FIFO_CTRL1 (07h) and FIFO_CTRL2 (08h))

FIFO_COMPR_RT_EN

Enables/disables compression algorithm runtime

ODRCHG_EN

Enables ODR CHANGE virtual sensor to be batched in FIFO

UNCOPTR_ RATE_[1:0]

This field configures the compression algorithm to write non-compressed data at each rate.

(0: non-compressed data writing is not forced;

1: non-compressed data every 8 batch data rate;

2: non-compressed data every 16 batch data rate;

3: non-compressed data every 32 batch data rate)

WTM8

FIFO watermark threshold, in conjunction with WTM_FIFO[7:0] in FIFO_CTRL1 (07h)

1 LSB = 1 sensor (6 bytes) + TAG (1 byte) written in FIFO

Watermark flag rises when the number of bytes written in the FIFO is greater than or equal to the

threshold level.

1. This bit is active if the FIFO_COMPR_EN bit of EMB_FUNC_EN_B (05h) is set to 1.

LSM6DSTX

FIFO_CTRL2 (08h)

DS14039 - Rev 1

page 51/175

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