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LSM6DSTX 数据表(PDF) 87 Page - STMicroelectronics |
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LSM6DSTX 数据表(HTML) 87 Page - STMicroelectronics |
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87 / 175 page  9.64 UI_CTRL3_OIS (72h) OIS configuration register. The primary interface can write this register when the OIS_CTRL_FROM_UI bit in the FUNC_CFG_ACCESS (01h) register is equal to 1 (primary IF full-control mode). This register is read- only when the OIS_CTRL_FROM_UI bit is equal to 0 (SPI2 full-control mode) and shows the content of the SPI2_CTRL3_OIS (72h) register. Table 171. UI_CTRL3_OIS register FS1_XL_OIS FS0_XL_OIS FILTER_XL_ CONF_OIS_2 FILTER_XL_ CONF_OIS_1 FILTER_XL_ CONF_OIS_0 0(1) 0(1) ST_OIS_ CLAMPDIS 1. This bit must be set to 0 for the correct operation of the device. Table 172. UI_CTRL3_OIS register description FS[1:0]_XL_OIS Selects accelerometer OIS channel full-scale. See Table 173. FILTER_XL_CONF_OIS_[2:0] Selects accelerometer OIS channel bandwidth. See Table 174. ST_OIS_CLAMPDIS Disables OIS chain clamp (0: all OIS chain outputs = 8000h during self-test; 1: OIS chain self-test outputs as shown in Table 175. Table 173. Accelerometer OIS channel full-scale selection FS[1:0]_XL_OIS XL_FS_MODE = 0 XL_FS_MODE = 1 XL UI ON XL UI PD - 00 (default) Full-scale selected from user interface ±2 g ±2 g 01 ±16 g ±2 g 10 ±4 g ±4 g 11 ±8 g ±8 g Note: XL_FS_MODE bit is in CTRL8_XL (17h). When the accelerometer full-scale value is selected only from the UI side, it is readable also from the OIS side. Table 174. Accelerometer OIS channel bandwidth and phase FILTER_XL_CONF_OIS[2:0] Typ. overall bandwidth [Hz] Typ. overall phase [°] 000 289 -5.72 @ 20 Hz 001 258 -6.80 @ 20 Hz 010 120 -13.2 @ 20 Hz 011 65.1 -21.5 @ 20 Hz 100 33.2 -19.1 @ 10 Hz 101 16.6 -33.5 @ 10 Hz 110 8.30 -26.7 @ 4 Hz 111 4.14 -26.2 @ 2 Hz LSM6DSTX UI_CTRL3_OIS (72h) DS14039 - Rev 1 page 87/175 |
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