LSM6DSTX datasheet(72/175 Pages) STMICROELECTRONICS

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9.37

MLC_STATUS_MAINPAGE (38h)

Machine learning core status register (R)

Table 107. MLC_STATUS_MAINPAGE register

IS_MLC8

IS_MLC7

IS_MLC6

IS_MLC5

IS_MLC4

IS_MLC3

IS_MLC2

IS_MLC1

Table 108. MLC_STATUS_MAINPAGE register description

IS_MLC8

Interrupt status bit for MLC8 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_MLC7

Interrupt status bit for MLC7 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_MLC6

Interrupt status bit for MLC6 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_MLC5

Interrupt status bit for MLC5 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_MLC4

Interrupt status bit for MLC4 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_MLC3

Interrupt status bit for MLC3 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_MLC2

Interrupt status bit for MLC2 interrupt event. (1: interrupt detected; 0: no interrupt2

IS_MLC1

Interrupt status bit for MLC1 interrupt event. (1: interrupt detected; 0: no interrupt)

9.38

STATUS_MASTER_MAINPAGE (39h)

Sensor hub source register (R)

Table 109. 117. STATUS_MASTER_MAINPAGE register

WR_ONCE

_DONE

SLAVE3

_NACK

SLAVE2

_NACK

SLAVE1

_NACK

SLAVE0

_NACK

SENS_HUB

_ENDOP

Table 110. STATUS_MASTER_MAINPAGE register description

WR_ONCE_DONE

When the bit WRITE_ONCE in MASTER_CONFIG (14h) is configured as 1, this bit is set to 1 when the

write operation on slave 0 has been performed and completed. Default value: 0

SLAVE3_NACK

This bit is set to 1 if not acknowledge occurs on slave 3 communication. Default value: 0

SLAVE2_NACK

This bit is set to 1 if not acknowledge occurs on slave 2 communication. Default value: 0

SLAVE1_NACK

This bit is set to 1 if not acknowledge occurs on slave 1 communication. Default value: 0

SLAVE0_NACK

This bit is set to 1 if not acknowledge occurs on slave 0 communication. Default value: 0

SENS_HUB_ENDOP

Sensor hub communication status. Default value: 0

(0: sensor hub communication not concluded;

1: sensor hub communication concluded)

9.39

FIFO_STATUS1 (3Ah)

FIFO status register 1 (R)

Table 111. FIFO_STATUS1 register

DIFF_

FIFO_7

DIFF_

FIFO_6

DIFF_

FIFO_5

DIFF_

FIFO_4

DIFF_

FIFO_3

DIFF_

FIFO_2

DIFF_

FIFO_1

DIFF_

FIFO_0

DIFF_ FIFO_[7:0]

Number of unread sensor data (TAG + 6 bytes) stored in FIFO

In conjunction with DIFF_FIFO[9:8] in FIFO_STATUS2 (3Bh).

LSM6DSTX

MLC_STATUS_MAINPAGE (38h)

DS14039 - Rev 1

page 72/175

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