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LSM6DSTX 数据表(PDF) 55 Page - STMicroelectronics |
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LSM6DSTX 数据表(HTML) 55 Page - STMicroelectronics |
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55 / 175 page  9.9 INT1_CTRL (0Dh) INT1 pin control register (R/W) Each bit in this register enables a signal to be carried over INT1 when the MIPI I3CSM dynamic address is not assigned (I²C or SPI is used). Some bits can be also used to trigger an IBI (in-band interrupt) when the MIPI I3CSM interface is used. The output of the pin is the OR combination of the signals selected here and in MD1_CFG (5Eh). Table 38. INT1_CTRL register DEN_ DRDY_flag INT1_ CNT_BDR INT1_ FIFO_FULL INT1_ FIFO_OVR INT1_ FIFO_TH INT1_ BOOT INT1_ DRDY_G INT1_ DRDY_XL Table 39. INT1_CTRL register description DEN_DRDY_flag Sends DEN_DRDY (DEN stamped on sensor data flag) to the INT1 pin INT1_CNT_ BDR Enables COUNTER_BDR_IA interrupt on the INT1 pin INT1_FIFO_FULL Enables FIFO full flag interrupt on the INT1 pin. It can be also used to trigger an IBI when the MIPI I3C SM interface is used. INT1_FIFO_OVR Enables FIFO overrun interrupt on the INT1 pin. It can be also used to trigger an IBI when the MIPI I3C SM interface is used. INT1_FIFO_TH Enables FIFO threshold interrupt on the INT1 pin. It can be also used to trigger an IBI when the MIPI I3CSM interface is used. INT1_BOOT Enables boot status on the INT1 pin INT1_DRDY_G Enables gyroscope data-ready interrupt on the INT1 pin. It can be also used to trigger an IBI when the MIPI I3CSM interface is used. INT1_ DRDY_XL Enables accelerometer data-ready interrupt on the INT1 pin. It can be also used to trigger an IBI when the MIPI I3CSM interface is used. 9.10 INT2_CTRL (0Eh) INT2 pin control register (R/W) Each bit in this register enables a signal to be carried over INT2 when the MIPI I3CSM dynamic address is not assigned (I²C or SPI is used). Some bits can be also used to trigger an IBI when the I3C interface is used. The output of the pin is the OR combination of the signals selected here and in MD2_CFG (5Fh). Table 40. INT2_CTRL register 0(1) INT2_ CNT_BDR INT2_ FIFO_FULL INT2_ FIFO_OVR INT2_ FIFO_TH INT2_ DRDY_TEMP INT2_ DRDY_G INT2_ DRDY_XL 1. This bit must be set to 0 for the correct operation of the device. Table 41. INT2_CTRL register description INT2_CNT_BDR Enables COUNTER_BDR_IA interrupt on the INT2 pin INT2_FIFO_FULL Enables FIFO full flag interrupt on the INT2 pin INT2_FIFO_OVR Enables FIFO overrun interrupt on the INT2 pin INT2_FIFO_TH Enables FIFO threshold interrupt on the INT2 pin INT2_DRDY_TEMP Enables temperature sensor data-ready interrupt on the INT2 pin. It can be also used to trigger an IBI when the MIPI I3CSM interface is used and INT2_ON_INT1 = 1 in CTRL4_C (13h). INT2_DRDY_G Gyroscope data-ready interrupt on the INT2 pin INT2_DRDY_XL Accelerometer data-ready interrupt on the INT2 pin LSM6DSTX INT1_CTRL (0Dh) DS14039 - Rev 1 page 55/175 |
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