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LSM6DSTX 数据表(PDF) 103 Page - STMicroelectronics |
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LSM6DSTX 数据表(HTML) 103 Page - STMicroelectronics |
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103 / 175 page  13.6 EMB_FUNC_INT1 (0Ah) INT1 pin control register (R/W) Each bit in this register enables a signal to be carried over INT1. The pin's output supplies the OR combination of the selected signals. Table 237. EMB_FUNC_INT1 register INT1_ FSM_LC 0(1) INT1_ SIG_MOT INT1_TILT INT1_STEP_ DETECTOR 0(1) 0(1) 0(1) 1. This bit must be set to 0 for the correct operation of the device. Table 238. EMB_FUNC_INT1 register description INT1_FSM_LC(1) Routing FSM long counter timeout interrupt event to INT1. Default value: 0 (0: routing to INT1 disabled; 1: routing to INT1 enabled) INT1_SIG_MOT(1) Routing significant motion event to INT1. Default value: 0 (0: routing to INT1 disabled; 1: routing to INT1 enabled) INT1_TILT(1) Routing tilt event to INT1. Default value: 0 (0: routing to INT1 disabled; 1: routing to INT1 enabled) INT1_STEP_DETECTOR(1) Routing pedometer step recognition event to INT1. Default value: 0 (0: routing to INT1 disabled; 1: routing to INT1 enabled) 1. This bit is activated if the INT1_EMB_FUNC bit of Section 9.57 MD1_CFG (5Eh) is set to 1. LSM6DSTX EMB_FUNC_INT1 (0Ah) DS14039 - Rev 1 page 103/175 |
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