C5C5EDELTA-RMSLASHD datasheet(38/114 Pages) NXP

38 / 114 page

CHAPTER 2: SIGNAL DESCRIPTIONS

Gigabit Ethernet and Fibre Channel TBI Configuration

1000BASE-T Gigabit Ethernet and Fibre Channel TBI is implemented in much the same

way as Gigabit Ethernet (GMII). Table 10 shows the possible CP pin combinations you can

use and Figure 4 shows receive and transmit pin configurations by cluster. Table 12 shows

the signals and pinouts for a single cluster for Gigabit Ethernet and Fibre Channel TBI.

The unused pins for the two cluster configurations should be wired down using a resistor.

Table 12 Gigabit Ethernet and Fibre Channel TBI Signals Example

SIGNAL NAME*

PIN #†

TOTAL

TYPE

I/O

LABEL

SIGNAL DESCRIPTION

CPn_0

Table 7 1

LVTTL

TCLK

Transmit Clock (125MHz). This clock is used to synchronize the

transmit data.

CPn_1

Table 7 1

CPn_2

Table 7 1

LVTTL

OPD

TXD(9)

Transmit Data (ten bits wide, last on wire)

CPn_3

Table 7 1

LVTTL

TXD(8)

Transmit Data

CPn_4

Table 7 1

LVTTL

TXD(7)

Transmit Data

CPn_5

Table 7 1

LVTTL

OPU

TXD(6)

Transmit Data

CPn_6

Table 7 1

LVTTL

TXD(1)

Transmit Data

CPn+1_0

Table 7 1

CPn+1_1

Table 7 1

ncPU

CPn+1_2

Table 7 1

LVTTL

TXD(5)

Transmit Data

CPn+1_3

Table 7 1

LVTTL

TXD(4)

Transmit Data

CPn+1_4

Table 7 1

LVTTL

OPD

TXD(3)

Transmit Data

CPn+1_5

Table 7 1

LVTTL

TXD(2)

Transmit Data

CPn+1_6

Table 7 1

LVTTL

TXD(0)

Transmit Data (ten bits wide, first on wire)

CPn+2_0

Table 7 1

ncPD

CPn+2_1

Table 7 1

LVTTL

RCLK

Receive Clock (62.5 MHz)

CPn+2_2

Table 7 1

LVTTL

RXD(9)

Receive Data (ten bits wide, last on wire)

CPn+2_3

Table 7 1

LVTTL

IPU

RXD(8)

Receive Data

CPn+2_4

Table 7 1

LVTTL

RXD(7)

Receive Data

CPn+2_5

Table 7 1

LVTTL

RXD(6)

Receive Data

CPn+2_6

Table 7 1

LVTTL

IPU

RXD(1)

Receive Data

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

C5C5EDELTA-RM/D 数据表(PDF) 38 Page - NXP Semiconductors

C5C5EDELTA-RM/D 数据表(HTML) 38 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载

链接网址

C5C5EDELTA-RM/D 数据表(PDF) 38 Page - NXP Semiconductors

C5C5EDELTA-RM/D 数据表(HTML) 38 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表 下载

链接网址

数据表下载