C5C5EDELTA-RMSLASHD datasheet(43/114 Pages) NXP

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Pin Descriptions Grouped by Function

Serial Interface Signals

The Serial interface is a bidirectional two-wire serial bus. It can use one of the following

formats:

• An 8bit data format followed by an acknowledge bit, which supports transfers at up to

400kbps (low speed).

• A 16bit IEEE 802.3 MDIO data format with 10bits of addressing, which supports

transfers up to 25MHz (high speed).

The signals and pins are identical for both the high and low speed protocols.

Which of the two data rates used is selected by the state of the PROM interface’s SPLD

signal that is asserted while the PROM interface is idle. When SPLD is asserted HI the low

speed serial bus protocol is selected and when SPLD is asserted LOW the MDIO protocol is

selected.

The bus only supports a single master hierarchy that can operate as either a receiver or a

transmitter.

Both SIDA and SICL are bidirectional lines that are connected, through a pull-up resistor, to

a positive supply voltage. When the bus is free, both lines are HIGH. The output stages of

the devices connected to the bus must have either an open-drain or open-collector in

order to perform the wired-AND function required for its arbitration mechanism.

PGNTX

Initiator bus grant (arbitration)

PIDSEL

PCI

Initialization device select

PINTA

PCI

Interrupt

TOTAL PINS

Table 15 PCI Signals (continued)

SIGNAL NAME

PIN #

TOTAL

TYPE

I/O

SIGNAL DESCRIPTION

Table 16 Serial Interface Signals

SIGNAL NAME

PIN #

TOTAL

TYPE

I/O

SIGNAL DESCRIPTION

SICL

LVTTL

PD/O

Serial Clock line

SIDA

LVTTL

IPD/O Serial Data line

TOTAL PINS

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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