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C5C5EDELTA-RM/D 数据表(PDF) 71 Page - NXP Semiconductors |
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C5C5EDELTA-RM/D 数据表(HTML) 71 Page - NXP Semiconductors |
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71 / 114 page ![]() JTAG Support 71 03 IDcode Register The C-5e NP implements a standard 32bit JTAG identification register. Table 34 lists the value of the code for full identification and its subcomponents. The concatenated 32bit value is hexidecimal 0002132d. JTAG Instruction Register The C-5e NP contains a 4bit instruction register. Table 35 lists the instructions that are supported. Table 34 JTAG Identification Code and Its Subcomponents FIELD NAME WIDTH BIT POSITIONS BINARY VALUE Version 4 31-28 0000 Part Number 16 27-12 0000_0000_0010_0001 Manufacturer Identity 11 11-1 001_1001_0110 LSB 1 0 1 Table 35 Instruction Register Instructions INSTRUCTION MNEMONIC SELECTED REGISTER INSTRUCTION OPCODE Extest Boundary Scan 0000 Idcode Identification Register 0001 Sample/Preload Boundary Scan 0010 Highz Bypass Register 0011 Clamp Bypass Register 0100 Bypass Bypass Register 0101 Reserved* Bypass Register 0110 Reserved* Bypass Register 0111 Bypass Bypass Register 1000 Bypass Bypass Register 1001 Bypass Bypass Register 1010 Bypass Bypass Register 1011 Bypass Bypass Register 1100 Bypass Bypass Register 1101 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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