C5C5EDELTA-RMSLASHD datasheet(77/114 Pages) NXP

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Power and Thermal Characteristics

Power and Thermal

Characteristics

Table 40 provides the derived power and thermal characteristics for the production

version of the C-5e NP.

Table 40

note: Power dissipation values assume the following conditions:

• BMU memory operating at 133MHz.

• TLU memory operating at 133MHz.

• QMU operating at 175MHz.

• VDD = 1.2V, VDD33 = 3.3V, TJ at approximately 50°C for typical values. VDD and VDD33

are 5% higher for maximum values.

• “Minimum” PD based on idle condition (clocks running and no programs executing).

• “Typical” PD based on test application that implements Fast Ethernet forwarding

actively running on all CPs.

• “Maximum” PD based on maximum consumption for any high-bandwidth

communications application executing on all CPs, FP, and XP.

Thermal Management

Information

This section provides thermal management information for the ceramic ball grid array

(CBGA) package for air-cooled applications. Proper thermal control design is primarily

dependent on the system-level design—the heat sink, airflow, and thermal interface

material. To reduce the die-junction temperature, heat sinks may be attached to the

package by several methods—spring clip to holes in the printed-circuit board or package,

and mounting clip and screw assembly (refer to Figure 10); however, due to the potential

Table 40 C-5e Network Processor Power and Thermal Characteristics

PARAMETER

MIN

TYP

MAX

UNITS

TEST CONDITIONS

Power Dissipation, P

5.5

9.2

13.0

266MHz core clock

See Note below

Maximum Junction

Temperature, T

125

See Note below

Thermal Resistance, junction

to case,

<0.1

oC/W

See Note below

Thermal Resistance, junction

to printed circuit board,

4.8

oC/W

See Note below

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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