C5C5EDELTA-RMSLASHD datasheet(80/114 Pages) NXP

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CHAPTER 3: ELECTRICAL SPECIFICATIONS

jc is the junction-to-case thermal resistance

int is the adhesive or interface material thermal resistance

sa is the heat sink base-to-ambient thermal resistance

d is the power dissipated by the device

During operation, the die-junction temperatures (T

j ) should be maintained less than the

value specified in Table 40. The temperature of the air cooling the component greatly

depends upon the ambient inlet air temperature and the air temperature rise within the

electronic cabinet. An electronic cabinet inlet-air temperature (T

a ) may range from 30° to

40°C. The air temperature rise within a cabinet (T r ) may be in the range of 5° to 10°C. The

thermal resistance of the thermal interface material (

int ) is typically about 1.5°C/W. For

example, assuming a T

a of 30°C, a T r of 5°C, a CBGA package θjc = 0.1, and a maximum

power consumption (P

d ) of 13.0 W, the following expression for T j is obtained:

Die-junction temperature: T

j = 30°C + 5°C + (0.1°C/W + 1.5°C/W + θsa ) x 13.0 W

For this example, a

sa value of 5.3°C/W or less is required to maintain the die junction

temperature below the maximum value of Table 40.

Though the die junction-to-ambient and the heat sink-to-ambient thermal resistances are

a common figure-of-merit used for comparing the thermal performance of various

microelectronic packaging technologies, one should exercise caution when only using

this metric in determining thermal management because no single parameter can

adequately describe three-dimensional heat flow. The final die-junction operating

temperature is not only a function of the component-level thermal resistance, but the

system-level design and its operating conditions. In addition to the component's power

consumption, a number of factors affect the final operating die-junction

temperature—airflow, board population (local heat flux of adjacent components), heat

sink efficiency, heat sink attach, heat sink placement, next-level interconnect technology,

system air temperature rise, altitude, etc.

Due to the complexity and the many variations of system-level boundary conditions for

today's microelectronic equipment, the combined effects of the heat transfer

mechanisms (radiation, convection,and conduction) may vary widely. For these reasons,

we recommend using conjugate heat transfer models for the board, as well as

system-level designs.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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