CS5535 datasheet(327/555 Pages) NSC

327 / 555 page

Revision 0.8

327

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PIT Register Descriptions (Continued)

5.8.2.4

PIT Timer 1 Status - Refresh (PIT_TMR1_STS_RFSH)

5.8.2.5

PIT Timer 2 Counter - Speaker (PIT_TMR2_CNTR_SPKR)

I/O Address

41h

Type

Reset Value

00h

PIT_TMR1_STS_RFSH Register Map

I/O Address 43h[7:0] = 1101x1x0 or 0110xxxx

CNTR1_CUR_COUNT

I/O Address 43h[7:0] = 1110x1x0

CNTR1_OUT

CNTR1_LOAD

CNTR1_RW

CNTR1_MODE

BCD

PIT_TMR1_STS_RFSH Bit Descriptions

Bit

Name

Description

I/O Address 43h[7:0] = 1101x1x0 or 0110xxxx

7:0

CNTR1_CUR_

COUNT

Counter 1 Current Count. Reports the current count value in Counter 1.

I/O Address 43h[7:0] = 1110x1x0

CNTR1_OUT

Counter 1 Output. Returns current state of counter output signal.

CNTR1_LOAD

Counter 1 Loaded. Last count written is loaded?

0: Yes.

1: No.

5:4

CNTR1_RW

Counter 1 Read /Write Mode.

00: Counter latch command.

01: R/W LSB only.

10: R/W MSB only.

11: R/W LSB, followed by MSB.

3:1

CNTR1_MODE

Counter 1 Current Mode.

000: Interrupt on terminal count.

001: Programmable one-shot.

010, 110: Rate generator.

011, 111: Square wave generator.

100: Software triggered pulse generator.

101: Hardware triggered pulse generator.

0BCD

BCD Mode.

0: Binary.

1: BCD (binary coded decimal).

I/O Address

42h

Type

Reset Value

00h

PIT_TMR2_CNTR_SPKR Register Map

CNTR2

CS5535 数据表(PDF) 327 Page - National Semiconductor (TI)

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