CS5535 datasheet(328/555 Pages) NSC

328 / 555 page

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328

Revision 0.8

PIT Register Descriptions (Continued)

5.8.2.6

PIT Timer 2 Status - Speaker (PIT_TMR2_STS_SPKR)

PIT_TMR2_CNTR_SPKR Bit Description

Bit

Name

Description

7:0

CNTR2

Counter 2 Value. Provides the base counter value.

I/O Address

42h

Type

Reset Value

00h

PIT_TMR2_STS_SPKR Register Map

I/O Address 43h[7:0] = 11011xx0 or 1000xxxx

CNTR2_CUR_COUNT

I/O Address 43h[7:0] = 11101xx0

CNTR2_OUT

CNTR2_LOAD

CNTR2_RW

CNTR2_MODE

BCD

PIT_TMR2_STS_SPKR Bit Descriptions

Bit

Name

Description

I/O Address 43h[7:0] = 11011xx0 or 1000xxxx

7:0

CNTR2_CUR_

COUNT

Counter 2 Current Count. Reports the current count value in Counter 2.

I/O Address 43h[7:0] = 11101xx0

CNTR2_OUT

Counter 2 Output. Returns current state of counter output signal.

CNTR2_LOAD

Counter 2 Loaded. Last count written is loaded?

0: Yes.

1: No.

5:4

CNTR2_RW

Counter 2 Read /Write Mode.

00: Counter latch command.

01: R/W LSB only.

10: R/W MSB only.

11: R/W LSB, followed by MSB.

3:1

CNTR2_MODE

Counter 2 Current Mode.

000: Interrupt on terminal count.

001: Programmable one-shot.

010, 110: Rate generator.

011, 111: Square wave generator.

100: Software triggered pulse generator.

101: Hardware triggered pulse generator.

0BCD

BCD Mode.

0: Binary.

1: BCD (binary coded decimal).

CS5535 数据表(PDF) 328 Page - National Semiconductor (TI)

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