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CS5535 数据表(PDF) 383 Page - National Semiconductor (TI) |
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CS5535 数据表(HTML) 383 Page - National Semiconductor (TI) |
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383 / 555 page  Revision 0.8 383 www.national.com UART/IR Controller Register Descriptions (Continued) 5.12.5 Bank 2 Register Descriptions The bit formats for the registers in Bank 2 are summarized in Table 5-39. Detailed descriptions of each register follow. 5.12.5.1 Baud Generator Divisor Port Baud Generator Divisor Low Byte (BGD_L) Baud Generator Divisor High Byte (BGD_H) This port performs the same function as the Legacy Baud Divisor port in Bank 1 and is accessed identically, but does not change the operation mode of the functional block when accessed. See Section 5.12.4.1 "Legacy Baud Generator Divisor Port" on page 381 for more details. Use this port to set the baud when operating in extended mode to avoid fallback to a non-extended operation mode (i.e., 16550 compatible). When programming the baud, writing to BGD_H causes the baud to change immediately. 5.12.5.2 Extended Control Register 1 (EXCR1) Use this register to control operation in the extended mode. Upon reset, all bits are set to 0. Table 5-39. Bank 2 Bit Map Register Bits I/O Offset Name 76 543 210 00h BGD_L BGD[7:0] 01h BGD_H BGD[15:8] 02h EXCR1 RSVD EDTLBK LOOP DMASWP DMATH DMANF EXT_SL 03h BSR BKSE BSR[6:0] 04h EXCR2 LOCK RSVD PRESL[1:0] RF_SIZ[1:0] TF_SIZ1[1:0] 05h RSVD RSVD 06h TXFLV RSVD TFL[5:0] 07h RXFLV RSVD RFL[5:0] I/O Offset 00h Type R/W Reset Value xxh I/O Offset 01h Type R/W Reset Value xxh I/O Offset 02h Type R/W Reset Value 00h EXCR1 Register Map 76 54 32 10 RSVD EDTLBK LOOP DMASWP DMATH DMANF EXT_SL EXCR1 Bit Descriptions Bit Name Description 7:6 RSVD Reserved. Write as 0. 5EDTLBK Enable Transmitter During Loopback. When this bit is set to 1, the transmitter serial output is enabled and functions normally when loopback is enabled. |
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