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TMP86FS49AIUG 数据表(PDF) 44 Page - Toshiba Semiconductor |
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TMP86FS49AIUG 数据表(HTML) 44 Page - Toshiba Semiconductor |
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44 / 296 page ![]() Page 28 2. Operational Description 2.2 System Clock Controller TMP86FS49AIUG 2.2.4.4 SLOW mode SLOW mode is controlled by the system control register 2 (SYSCR2). The following is the methods to switch the mode with the warm-up counter. (1) Switching from NORMAL2 mode to SLOW1 mode First, set SYSCR2<SYSCK> to switch the main system clock to the low-frequency clock for SLOW2 mode. Next, clear SYSCR2<XEN> to turn off high-frequency oscillation. Note: The high-frequency clock can be continued oscillation in order to return to NORMAL2 mode from SLOW mode quickly. Always turn off oscillation of high-frequency clock when switching from SLOW mode to stop mode. Example 1 :Switching from NORMAL2 mode to SLOW1 mode. SET (SYSCR2). 5 ; SYSCR2<SYSCK> ← 1 (Switches the main system clock to the low-frequency clock for SLOW2) CLR (SYSCR2). 7 ; SYSCR2<XEN> ← 0 (Turns off high-frequency oscillation) Example 2 :Switching to the SLOW1 mode after low-frequency clock has stabilized. SET (SYSCR2). 6 ; SYSCR2<XTEN> ← 1 LD (TC5CR), 43H ; Sets mode for TC6, 5 (16-bit mode, fs for source) LD (TC6CR), 05H ; Sets warming-up counter mode LDW (TTREG5), 8000H ; Sets warm-up time (Depend on oscillator accompanied) DI ; IMF ← 0 SET (EIRE). 2 ; Enables INTTC6 EI ; IMF ← 1 SET (TC6CR). 3 ; Starts TC6, 5 : PINTTC6: CLR (TC6CR). 3 ; Stops TC6, 5 SET (SYSCR2). 5 ; SYSCR2<SYSCK> ← 1 (Switches the main system clock to the low-frequency clock) CLR (SYSCR2). 7 ; SYSCR2<XEN> ← 0 (Turns off high-frequency oscillation) RETI : VINTTC6: DW PINTTC6 ; INTTC6 vector table |
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