TMP86FS49AIUG datasheet(79/296 Pages) TOSHIBA

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Page 63

TMP86FS49AIUG

Note 1: i = 7 to 0

Note 2: STOP is bit7 in SYSCR1.

Note 3: SAIN is AD input select signal.

Figure 5-9 Port 7, P7CR1 and P7CR2

Note 1: The port placed in input mode reads the pin input state. Therefore, when the input and output modes are used together,

the output latch contents for the port in input mode might be changed by executing a bit manipulation instruction.

Note 2: When used as an analog inport, be sure to clear the corresponding bit of P7CR2 to disable the port input.

Note 3: Do not set the output mode (P7CR1 = “1”) for the pin used as an analog input pin.

Note 4: Pins not used for analog input can be used as I/O ports. During AD conversion, output instructions should not be executed

to keep a precision. In addition, a variable signal should not be input to a port adjacent to the analog input during AD con-

version.

P7DR

(0007H)

R/W

543

P77

AIN15

P76

AIN14

P75

AIN13

P74

AIN12

P73

AIN11

P72

AIN10

P71

AIN9

P70

AIN8

(Initial value: 0000 0000)

P7CR1

(0F9DH)

543

(Initial value: 0000 0000)

P7CR1

I/O control for port P7 (Specified for each bit)

0: Input mode

1: Output mode

R/W

P7CR2

(0F9EH)

543

(Initial value: 1111 1111)

P7CR2

P7 port input control (Specified for each bit)

0: Analog input

1: Port input, external interrupt input or key-on wakeup

input

R/W

P7i

P7CR2i

P7CR2i input

P7CR1i

P7CR1i input

Data input (P7DRi)

Data output (P7DRi)

STOP

OUTTEN

Analog input

AINDS

SAIN

Control input

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