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TMP86FS49AIUG 数据表(PDF) 71 Page - Toshiba Semiconductor |
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TMP86FS49AIUG 数据表(HTML) 71 Page - Toshiba Semiconductor |
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71 / 296 page ![]() Page 55 TMP86FS49AIUG 5.4 Port P3 (P37 to P30) (Large Current Port) Port P3 is an 8-bit input/output port. When used as an input port, the corresponding output latch (P3DR) should be set to "1". During reset, the P3DR is initialized to "1". P3 port output latch (P3DR) and P3 port terminal input (P3PRD) are located on their respective address. When read the output latch data, the P3DR should be read. When read the terminal input data, the P3PRD register should be read. Note: i = 7 to 0 Figure 5-5 Port 3 P3DR (0003H) 76 543 21 0 P37 P36 P35 P34 P33 P32 P31 P30 (Initial value: 1111 1111) R/W P3PRD (000DH) Read only P37 P36 P35 P34 P33 P32 P31 P30 Data output (P3DR) STOP OUTEN DQ P3i Data input (P3PRD) Output latch read (P3DR) |
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