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TMP86FS49AIUG 数据表(PDF) 177 Page - Toshiba Semiconductor |
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TMP86FS49AIUG 数据表(HTML) 177 Page - Toshiba Semiconductor |
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177 / 296 page  Page 161 TMP86FS49AIUG Note 1: The operation error flag (TXERR and RXERR) are not automatically cleared by stopping transfer with SIO1CR<SIOS> "0". Therefore, set these bits to "0" for clearing these error flag. Or set SIO1CR<SIOINH> to "1". Note 2: *: Don't care Note 1: SIO1TDB is write only register. A bit manipulation should not be performed on the transmit buffer register using a read- modify-write instruction. Note 2: The SIO1TDB should be written after checking SIO1SR<TXF> "1". When SIO1SR<TXF> is "0", the writing data can't be transferred to SIO1TDB even if write instruction is executed to SIO1TDB Note 3: *: Don't care Serial Interface Status Register SIO1SR (0021H) 765 43 21 0 SIOF SEF TXF RXF TXERR RXERR (Initial value: 0010 00**) SIOF Serial transfer operation status monitor 0: Transfer finished 1: Transfer in progress Read only SEF Number of clocks monitor 0: 8 clocks 1: 1 to 7 clocks TXF Transmit buffer empty flag 0: Data exists in transmit buffer 1: No data exists in transmit buffer RXF Receive buffer full flag 0: No data exists in receive buffer 1: Data exists in receive buffer TXERR Transfer operation error flag Read 0: – (No error exist) 1: Transmit buffer under run occurs in an external clock mode Write 0: Clear the flag 1: – (A write of "1" to this bit is ignored) R/W RXERR Receive operation error flag Read 0: – (No error exist) 1: Receive buffer over run occurs in an external clock mode Write 0: Clear the flag 1: – (A write of "1" to this bit is ignored) Receive buffer register SIO1RDB (0022H) 765 43 21 0 Read only (Initial value: 0000 0000) Transmit buffer register SIO1TDB (0022H) 765 43 21 0 Write only (Initial value: **** ****) |
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