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ST10F167 数据表(PDF) 29 Page - STMicroelectronics

部件名 ST10F167
功能描述  16-BIT MCU WITH 128K BYTE FLASH MEMORY
PDF  69 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST10F167 数据表(HTML) 29 Page - STMicroelectronics

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ST10F167
12
WATCHDOG TIMER
The Watchdog Timer is a fail-safe mechanism. It
limits the maximum malfunction time of the con-
troller
The Watchdog Timer is always enabled after a re-
set of the chip, and can only be disabled in the
time interval until the EINIT (end of initialization)
instruction has been executed. In this way the
chip’s start-up procedure is always monitored. The
software must be designed to service the Watch-
dog Timer before it overflows. If, due to hardware
or software related failures, the software fails to do
so, the Watchdog Timer overflows and generates
an internal hardware reset and pulls the RSTOUT
pin low in order to allow external hardware compo-
nents to be reset.
The Watchdog Timer is a 16-bit timer, clocked with
the system clock divided either by 2 or by 128. The
high byte of the Watchdog Timer register can be
set to a pre-specified reload value (stored in
WDTREL) in order to allow further variation of the
monitored time interval. Each time it is serviced by
the application software, the high byte of the
Watchdog Timer is reloaded. Therefore, time inter-
vals between 25
µs and 420ms can be monitored
(@ 20 MHz). The default Watchdog Timer interval
after reset is 6.55 ms (@ 20 MHz).
13
A/D CONVERTER
A 10-bit A/D converter with 16 multiplexed input
channels and a sample and hold circuit has been
integrated on-chip for
analog signal measure-
ment. It uses a successive approximation method.
The sample time (for loading the capacitors) and
conversion time is programmable and can be
modified for the external circuitry.
Overrun error detection/protection is provided for
the conversion result register (ADDAT). When the
result of a previous conversion has not been read
from the result register at the time the next conver-
sion is complete, either an interrupt request is gen-
erated, or the next conversion is suspended, until
the previous result has been read.
For applications which require less than 16 analog
input channels, the remaining channel inputs can
be used as digital input port pins.
The A/D converter of the ST10F167 supports four
different conversion modes. In the standard Single
Channel conversion mode, the analog level on a
specified channel is sampled once and converted
to a digital result. In the Single Channel Continu-
ous mode, the analog level on a specified channel
is repeatedly sampled and converted without soft-
ware intervention. In the Auto Scan mode, the an-
alog levels on a prespecified number of channels
are sequentially sampled and converted. In the
Auto Scan Continuous mode, the number of pre-
specified channels is repeatedly sampled and con-
verted. In addition, the conversion of a specific
channel can be inserted (injected) into a running
sequence without disturbing this sequence. This is
called Channel Injection Mode.
The Peripheral Event Controller (PEC) may be
used to automatically store the conversion results
into a table in memory for later evaluation, without
the overhead of interrupt routines for each data
transfer.
After each reset and also during normal operation,
the ADC automatically performs calibration cycles.
This automatic self-calibration constantly adjusts
the converter to the changing operating conditions
(e.g. temperature) and compensates process vari-
ations.
These calibration cycles are part of the conversion
cycle. They do not affect the normal operation of
the A/D converter.
3



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