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ST10F167 数据表(PDF) 45 Page - STMicroelectronics

部件名 ST10F167
功能描述  16-BIT MCU WITH 128K BYTE FLASH MEMORY
PDF  69 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST10F167 数据表(HTML) 45 Page - STMicroelectronics

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ST10F167
20.4 A/D Converter Characteristics
V
DD =5 V ± 5%, VSS =0 V, TA = -40 to +85 °C
4.0 V
≤ V
AREF ≤ VDD+0.1 V, VSS-0.1 V ≤ VAGND ≤ VSS+0.2 V
Sample
time
and
conversion
time
of
the
ST10F167’s ADC are programmable. Table 20.3
shows the timing calculations.
Notes 1:VAIN may exceed VAGND or VAREF up to the absolute maximum ratings. However, the conver-
sion result in these cases will be X000H or X3FFH, respectively.
2:During the sample time the input capacitance CI can be charged/discharged by the external
source. The internal resistance of the analog source must allow the capacitance to reach its final
voltage level within tS. After the end of the sample time tS, changes of the analog input voltage
have no effect on the conversion result.
Values for the sample clock tSC depend on programming and can be taken from the table above.
3:This parameter includes the sample time tS, the time for determining the digital result and the
time to load the result register with the conversion result.
Values for the conversion clock tCC depend on programming and can be taken from the table
above.
4:This parameter depends on the ADC control logic. It is not a real maximum value, but rather a
Table 20.2
A/D Converter Characteristics
Parameter
Symbol
Limit Values
Unit
Test Condition
min.
max.
Analog input voltage range
V
AIN
SR
V
AGND
V
AREF
V1)
Sample time
t
S
CC
2
t
SC
2) 4)
Conversion time
t
C
CC
14
t
CC + tS
+ 4TCL
3) 4)
Total unadjusted error
TUE
CC
+ 3
LSB
5)
Internal resistance of reference
voltage source
R
AREF
SR
t
CC /165
-0.25
k
tCC in [ns] 6) 7)
Internal resistance of analog
source
R
ASRC
SR
t
S / 330
-0.25
k
tS in [ns] 2) 7)
ADC input capacitance
C
AIN
CC
33
pF
7)
Table 20.3
Sample and Conversion Time Calculations
ADCON.15|14
(ADCTC)
Conversion clock
t
CC
ADCON.13|12
(ADSTC)
Sample clock t
SC
00
TCL * 24
00
t
CC
01
Reserved, do not use
01
t
CC *2
10
TCL * 96
10
t
CC *4
11
TCL * 48
11
t
CC *8
3



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