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ST10F167 数据表(PDF) 33 Page - STMicroelectronics |
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ST10F167 数据表(HTML) 33 Page - STMicroelectronics |
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33 / 69 page ![]() 33/69 ST10F167 18 BOOTSTRAP LOADER To activate the Boot-strap loader, a hardware re- set with RSTIN pin low and an external pull-up re- sistor connected to the ALE pin, is applied. This forces the chip into a special test mode. The pro- gram execution starts from 1K bytes ROM, mapped from 0 to 3FF hex which is not accessible in normal execution mode. This test ROM contains a one-time programmable flash EPROM, loaded with a self-test program plus the Boot-strap loader program. When the Boot- strap loader mode is activated, an instruction fetch is performed from the test ROM regardless of the configuration selected with the EBC0, EBC1 and BUSACT pins. The reset vector in the test ROM branches to the self-test program, while the Non- Maskable Interrupt vector (NMI) branches to the Boot-strap loader routine. The self-test routine execution time is approxi- mately 10ms. It terminates with a software reset instruction (SRST), where the chip is restarted ac- JBC Jump relative and clear bit if direct bit is set 4 JNBS Jump relative and set bit if direct bit is not set 4 CALLA, CALLI, CALLR Call absolute/indirect/relative subroutine if condition is met 4 CALLS Call absolute subroutine in any code segment 4 PCALL Push direct word register onto system stack and call absolute subroutine 4 TRAP Call interrupt service routine via immediate trap number 2 PUSH, POP Push/pop direct word register onto/from system stack 2 SCXT Push direct word register onto system stack and update register with word operand 4 RET Return from intra-segment subroutine 2 RETS Return from inter-segment subroutine 2 RETP Return from intra-segment subroutine and pop direct word register from system stack 2 RETI Return from interrupt service subroutine 2 SRST Software Reset 4 IDLE Enter Idle Mode 4 PWRDN Enter Power Down Mode (assumes NMI-pin low) 4 SRVWDT Service Watchdog Timer 4 DISWDT Disable Watchdog Timer 4 EINIT Signify End-of-Initialization on RSTOUT-pin 4 ATOMIC Begin ATOMIC sequence 2 EXTR Begin EXTended Register sequence 2 EXTP(R) Begin EXTended Page (and Register) sequence 2 / 4 EXTS(R) Begin EXTended Segment (and Register) sequence 2 / 4 NOP Null operation 2 Table 17.1 Instruction Set (cont’d) Mnemonic Description Bytes 3 |
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