ST10F167 datasheet(30/69 Pages) STMICROELECTRONICS

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ST10F167

SERIAL CHANNELS

Serial communication with other microcontrollers,

processors, terminals or external peripheral com-

ponents is provided by two serial interfaces. An

Asynchronous/Synchronous

Serial

Channel

(ASC0) and a High-Speed Synchronous Serial

Channel (SSC).

ASC0 supports full-duplex asynchronous commu-

nication up to 625 KBaud and half-duplex synchro-

nous communication up to 2.5 Mbaud @ 20MHz

system clock.

The SSC allows half duplex synchronous commu-

nication up to 5 Mbaud @ 20MHz system clock.

Two dedicated baud rate generators are used to

set up standard baud rates without oscillator tun-

ing. For transmission, reception, and erroneous

reception, 3 separate interrupt vectors are provid-

ed for each serial channel.

In asynchronous mode, 8- or 9-bit data frames are

transmitted or received, preceded by a start bit

and terminated by one or two stop bits. For multi-

processor communication, a mechanism to distin-

guish address from data bytes has been included

(8-bit data + wake up bit mode).

In synchronous mode, the ASC0 transmits or re-

ceives bytes (8 bits) synchronously to a shift clock

which is generated by the ASC0. The SSC trans-

mits or receives characters of 2...16 bits length

synchronously to a shift clock. The shift clock can

be generated by the SSC (master mode) or by an

external master (slave mode). The SSC can start

shifting with the LSB or with the MSB, while the

ASC0 always shifts the LSB first. A loop back op-

tion is available for testing purposes.

A number of optional hardware error detection ca-

pabilities have been included to increase the relia-

bility of data transfers. A parity bit can automatical-

ly be generated on transmission or be checked on

reception. ‘framing error detection’ recognizes

data frames with missing stop bits. An overrun er-

ror is generated if the last character received was

not read out of the receive buffer register, on the

reception of a new character.

CAN-MODULE

The integrated CAN-Module performs the autono-

mous transmission and reception of CAN frames

in accordance with the CAN specification V2.0 part

B (active). The on-chip CAN-Module can receive

and transmit standard frames with 11-bit identifiers

as well as extended frames with 29-bit identifiers.

The module provides full CAN functionality for up

to 15 message objects. Message object 15 may be

configured for Basic CAN functionality. Both

modes provide separate masks for acceptance fil-

tering which allows to accept a number of identifi-

ers in Full CAN mode and also allows to disregard

a number of identifiers in Basic CAN mode. All

message objects can be updated independent

from the other objects and are equipped for the

maximum message length of 8 bytes.

The bit timing is derived from the XCLK and is pro-

grammable up to a data rate of 1 MBaud. The

CAN-Module uses two pins to interface to a bus

transceiver.

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