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ST10F167 数据表(PDF) 52 Page - STMicroelectronics

部件名 ST10F167
功能描述  16-BIT MCU WITH 128K BYTE FLASH MEMORY
PDF  69 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST10F167 数据表(HTML) 52 Page - STMicroelectronics

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ST10F167
ALE falling edge to CS
t
38 CC
-5 -
t
A
10 -
t
A
-5 -
t
A
10 -
t
A
ns
CS low to Valid Data In
t
39 SR
–
45
+
t
C +2tA
–
3TCL - 30
+
t
C +2tA
ns
CS hold after RD, WR
t
40 CC
60 +
t
F
–
3TCL - 15 +
t
F
–ns
ALE fall. edge to RdCS,
WrCS (with RW delay)
t
42 CC
20 +
t
A
–
TCL - 5 +
t
A
–ns
ALE fall. edge to RdCS,
WrCS (no RW delay)
t
43 CC
-5 +
t
A
–-5 +
t
A
–ns
Address float after RdCS,
WrCS (with RW delay)
t
44 CC
–
0
–
0
ns
Address float after RdCS,
WrCS (no RW delay)
t
45 CC
–
25
–
TCL
ns
RdCS to Valid Data In
(with RW delay)
t
46 SR
–
15 +
t
C
–
2TCL - 35
+
t
C
ns
RdCS to Valid Data In
(no RW delay)
t
47 SR
–
50 +
t
C
–
3TCL - 25
+
t
C
ns
RdCS, WrCS Low Time
(with RW delay)
t48 CC
40 +
tC
–
2TCL - 10
+
t
C
–ns
RdCS, WrCS Low Time
(no RW delay)
t
49 CC
65 +
t
C
–
3TCL - 10
+
t
C
–ns
Data valid to WrCS
t
50 CC
35 +
t
C
–
2TCL - 15
+
tC
–ns
Data hold after RdCS
t
51 SR
0
–
0
–
ns
Data float after RdCS
t
52 SR
–
30 +
t
F
–
2TCL - 20 +
t
F
ns
Address hold after
RdCS, WrCS
t
54 CC
30 +
t
F
–
2TCL - 20 +
t
F
–ns
Data hold after WrCS
t
56 CC
30 +
t
F
–
2TCL - 20 +
t
F
–ns
Table 20.6
Multiplexed Bus Characteristics (cont’d)
Parameter
Symbol
Max. CPU Clock
=20 MHz
Variable CPU Clock
1/2TCL = 1 to 20 MHz
Unit
min.
max.
min.
max.
3



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