STE10 datasheet(14/66 Pages) STMICROELECTRONICS

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STE10/100

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CR49(offset = c4h), PMR1, Power Management Register 1.

31~16

---

reserved

PMEST

PME_Status. This bit is set whenever the STE10/100 detects

a wake-up event, regardless of the state of the PME-En bit.

Writing a “1” to this bit will clear it, causing the STE10/100 to

deassert PME# (if so enabled). Writing a “0” has no effect.

If PSD3c (bit 31 of PMR0) is cleared (i.e. it does not support

PME# generation from D3cold), this bit is by default 0;

otherwise, PMEST is cleared upon power-up reset only and is

not modified by either hardware or software reset.

R/W1C*

14,13

DSCAL

Data_Scale. Indicates the scaling factor to be used when

interpreting the value of the Data register. This field is

required for any function that implements the Data register.

The STE10/100 does not support Data register and

Data_Scale.

00b

12~9

DSEL

Data_Select. This four bit field is used to select which data is

to be reported through the Data register and Data_Scale field.

This field is required for any function that implements the Data

The STE10/100 does not support Data_select.

0000b

R/W

PME_En

PME_En. When set, enables the STE10/100 to assert PME#.

When cleared, disables the PME# assertion.

If PSD3c (bit 31 of PMR0) is cleared (i.e. it does not support

PME# generation from D3cold), this bit is by default 0;

otherwise, PME_En is cleared upon power up reset only and is

not modified by either hardware or software reset.

R/W

7~2

---

reserved.

000000b

1,0

PWRS

PowerState. This two bit field is used both to determine the

current power state of the STE10/100 and to place the STE10/

100 in a new power state. The definition of this field is given

below.

00b - D0

01b - D1

10b - D2

11b - D3hot

If software attempts to write an unsupported state to this field,

the write operation will complete normally on the bus, but the

data is discarded and no state change occurs.

00b

R/W

R/W1C*, Read Only and Write one cleared.

Table 4. Configuration Registers Descriptions

Bit #

Name

Descriptions

Default Val

RW Type

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