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STE10 数据表(PDF) 2 Page - STMicroelectronics

部件名 STE10
功能描述  PCI 10/100 ETHERNET CONTROLLER WITH INTEGRATED PHY 5V
PDF  66 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STE10 数据表(HTML) 2 Page - STMicroelectronics

  STE10 Datasheet HTML 1Page - STMicroelectronics STE10 Datasheet HTML 2Page - STMicroelectronics STE10 Datasheet HTML 3Page - STMicroelectronics STE10 Datasheet HTML 4Page - STMicroelectronics STE10 Datasheet HTML 5Page - STMicroelectronics STE10 Datasheet HTML 6Page - STMicroelectronics STE10 Datasheet HTML 7Page - STMicroelectronics STE10 Datasheet HTML 8Page - STMicroelectronics STE10 Datasheet HTML 9Page - STMicroelectronics Next Button
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STE10/100
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2.3 PCI I/F
s
Provides 32-bit PCI bus master data transfer
s
Supports PCI clock with frequency from 0Hz to 33MHz
s
Supports network operation with PCI system clock from 20MHz to 33MHz
s
Provides performance meter and PCI bus master latency timer for tuning the threshold to enhance the
performance
s
Provides burst transmit packet interrupt and transmit/receive early interrupt to reduce host CPU
utilization
s
As bus master, supports memory-read, memory-read-line, memory-read-multiple, memory-write,
memory-write-and-invalidate command
s
Supports big or little endian byte ordering
2.4 EEPROM/Boot ROM I/F
s
Provides writeable Flash ROM and EPROM as boot ROM, up to 128kB
s
Provides PCI to access boot ROM by byte, word, or double word
s
Re-writes Flash boot ROM through I/O port by programming register
s
Provides serial interface for read/write 93C46 EEPROM
s
Automatically loads device ID, vendor ID, subsystem ID, subsystem vendor ID, Maximum-Latency , and
Minimum-Grand from the 64 byte contents of 93C46 after PCI reset de-asserted
2.5 MAC/Physical
s
Integrates the complete set of Physical layer 100BASE-TX and 10BASE-T functions
s
Provides Full-duplex operation in both 100Mbps and 10Mbps modes
s
Provides Auto-negotiation (NWAY) function of full/half duplex operation for both 10 and 100 Mbps
s
Provides MLT-3 transceiver with DC restoration for Base-line wander compensation
s
Provides transmit wave-shaper, receive filters, and adaptive equalizer
s
Provides MAC and Transceiver (TXCVR) loop-back modes for diagnostic
s
Built-in Stream Cipher Scrambler/ De-scrambler and 4B/5B encoder/decoder
s
Supports external transmit transformer with 1.414:1 turn ratio
s
Supports external receive transformer with 1:1 turn ratio
2.6 LED Display
s
Provides 2 LED display modes:
3 LED displays for
100Mbps (on) or 10Mbps (off)
Link (Remains on when link ok) or Activity (Blinks at 10Hz when receiving or transmitting collision-free)
FD (Remains on when in Full duplex mode) or when collision detected (Blinks at 20Hz)
4 LED displays for
100 Link (On when 100M link ok)
10 Link (On when 10M link ok)
Activity (Blinks at 10Hz when receiving or transmitting)
FD (Remains on when in Full duplex mode) or when collision detected (Blinks at 20Hz)



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