R8CSLASH2G datasheet(123/344 Pages) RENESAS

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R8C/2G Group

11. Clock Generation Circuit

Rev.1.00

Apr 04, 2008

Page 103 of 318

REJ09B0387-0100

11.4.3

Stop Mode

Since the oscillator circuits stop in stop mode, the CPU clock and peripheral function clock stop and the CPU

and peripheral functions that use these clocks stop operating. The least power required to operate the MCU is in

stop mode. If the voltage applied to the VCC pin is VRAM or more, the contents of internal RAM is

maintained.

The peripheral functions clocked by external signals continue operating.

Table 11.4 lists Interrupts to Exit Stop Mode and Usage Conditions.

11.4.3.1

Entering Stop Mode

The MCU enters stop mode when the CM10 bit in the CM1 register is set to 1 (all clocks stop). At the same

time, the CM06 bit in the CM0 register is set to 1 (divide-by-8 mode), the CM03 bit in the CM0 register is set to

1 (XCIN clock oscillator circuit drive capacity high).

11.4.3.2

Pin Status in Stop Mode

The status before wait mode was entered is maintained.

When the CM04 bit in the CM0 register is set to 1 (XCIN-XCOUT pin), the XCIN(P4_3) pin is set to the high-

impedance state and the XCOUT (P4_4) pin is set to “H”. When the CM04 bit is set to 0 (I/O ports P4_3 and

P4_4), pins XCIN (P4_3) and XOUT (P4_4) retain the I/O status (status just before stop mode is entered).

Table 11.4

Interrupts to Exit Stop Mode and Usage Conditions

Interrupt

Usage Conditions

Key input interrupt

−

INT0, INT1, INT2, INT4 interrupt Can be used if there is no filter

Timer RA interrupt

When there is no filter and external pulse is counted in event counter

mode

Serial interface interrupt

When external clock is selected

Voltage monitor 1 interrupt

Usable in digital filter disabled mode (VW1C1 bit in VW1C register is

set to 1)

Voltage monitor 2 interrupt

Usable in digital filter disabled mode (VW2C1 bit in VW2C register is

set to 1)

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