R8CSLASH2G datasheet(124/344 Pages) RENESAS

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R8C/2G Group

11. Clock Generation Circuit

Rev.1.00

Apr 04, 2008

Page 104 of 318

REJ09B0387-0100

11.4.3.3

Exiting Stop Mode

The MCU exits stop mode by a reset or peripheral function interrupt.

Figure 11.12 shows the Time from Stop Mode to Interrupt Routine Execution.

When using a peripheral function interrupt to exit stop mode, set up the following before setting the CM10 bit

to 1.

(1) Set the interrupt priority level in bits ILVL2 to ILVL0 of the peripheral function interrupts to be used for

exiting stop mode. Set bits ILVL2 to ILVL0 of the peripheral function interrupts that are not to be used

for exiting stop mode to 000b (interrupt disabled).

(2) Set the I flag to 1.

(3) Operates the peripheral function to be used for exiting stop mode.

When exiting by a peripheral function interrupt, the interrupt sequence is executed when an interrupt request is

generated and the CPU clock supply is started.

If the clock used immediately before stop mode is a system clock and stop mode is exited by a peripheral

function interrupt, the CPU clock becomes the previous system clock divided by 8.

Figure 11.12

Time from Stop Mode to Interrupt Routine Execution

Following total

time of T0 to T4 is

the time from stop

mode until an

interrupt handling

is executed.

Flash memory

activation sequence

CPU clock restart

sequence

Interrupt sequence

Oscillation time of

CPU clock source

used immediately

before stop mode

Stop

mode

Internal

power

stability time

Interrupt

request

generated

150 µs

(max.)

Time until Flash Memory

is Activated (T2)

Time until CPU Clock

is Supplied (T3)

Time for Interrupt

Sequence (T4)

Remarks

FMSTP Bit

FMR0 Register

Period of CPU clock

× 6 cycles

Period of CPU clock

× 20 cycles

Period of system clock

× 12 cycles + 30 µs (max.)

Period of system clock

× 12 cycles

Same as above

(flash memory operates)

(flash memory stops)

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