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R8C/2G 数据表(PDF) 210 Page - Renesas Technology Corp |
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R8C/2G 数据表(HTML) 210 Page - Renesas Technology Corp |
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210 / 344 page ![]() R8C/2G Group 17. Timers Rev.1.00 Apr 04, 2008 Page 190 of 318 REJ09B0387-0100 Figure 17.36 Operating Example in Real-Time Clock Mode IR bit in TREIC register 03 IR bit in TREIC register Bits WK2 to WK0 in TREWK register (when SEIE bit in TRECR2 register is set to 1 (enable periodic interrupt triggered every second)) (when MNIE bit in TRECR2 register is set to 1 (enable periodic interrupt triggered every minute)) 1 0 PM bit in TRECR1 register Bits HR11 to HR00 in TREHR register (Not changed) Set to 0 by acknowledgement of interrupt request or a program 04 Bits MN12 to MN00 in TREMIN register 58 59 00 BSY bit Approx. 62.5 ms Bits SC12 to SC00 in TRESEC register 1s BSY: Bit in registers TRESEC, TREMIN, TREHR, and TREWK Approx. 62.5 ms 1 0 1 0 (Not changed) (Not changed) |
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