数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

R8C/2G 数据表(PDF) 214 Page - Renesas Technology Corp

部件名 R8C/2G
功能描述  RENESAS MCU R8C FAMILY / R8C/2x SERIES
PDF  344 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

R8C/2G 数据表(HTML) 214 Page - Renesas Technology Corp

Back Button R8C/2G Datasheet HTML 210Page - Renesas Technology Corp R8C/2G Datasheet HTML 211Page - Renesas Technology Corp R8C/2G Datasheet HTML 212Page - Renesas Technology Corp R8C/2G Datasheet HTML 213Page - Renesas Technology Corp R8C/2G Datasheet HTML 214Page - Renesas Technology Corp R8C/2G Datasheet HTML 215Page - Renesas Technology Corp R8C/2G Datasheet HTML 216Page - Renesas Technology Corp R8C/2G Datasheet HTML 217Page - Renesas Technology Corp R8C/2G Datasheet HTML 218Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 214 / 344 page
background image
R8C/2G Group
17. Timers
Rev.1.00
Apr 04, 2008
Page 194 of 318
REJ09B0387-0100
Figure 17.40
TRECR1 Register in Output Compare Mode
Figure 17.41
TRECR2 Register in Output Compare Mode
Timer RE Control Register 1
Symbol
Address
After Reset
TRECR1
011Ch
XXX0X0X0b
Bit Symbol
Bit Name
Function
RW
H12_H24
Operating mode select bit
RW
Set to 0 in output compare mode.
Timer RE reset bit
When setting this bit to 0, after setting it to 1, the
follow ing w ill occur.
• Registers TRESEC, TREMIN, TREHR, TREWK,
and TRECR2 are set to 00h.
• Bits TCSTF, INT, PM, H12_H24, and
TSTART in the TRECR1 register are
set to 0.
• The 8-bit counter is set to 00h and
the 4-bit counter is set to 0h.
RW
RW
TREO pin output enable bit
0 : Disable clock output
1 : Enable clock output
TOENA
RW
RW
TSTART
Timer RE count start bit
0 : Count stops
1 : Count starts
RW
Interrupt request timing bit
Set to 0 in output compare mode.
PM
A.m./p.m. bit
TRERST
TCSTF
RO
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Timer RE count status flag
0 : Count stopped
1 : Counting
00
b7 b6 b5 b4 b3 b2
INT
b1 b0
0
(b0)
Timer RE Control Register 2
Symbol
Address
After Reset
TRECR2
011Dh
00XXXXXXb
Bit Symbol
Bit Name
Function
RW
b3 b2
DYIE
b1 b0
00
00
SEIE
b7 b6 b5 b4
Periodic interrupt triggered every
minute enable bit
Periodic interrupt triggered every
second enable bit
0
HRIE
RW
RW
Periodic interrupt triggered every
day enable bit
COMIE
Compare match interrupt enable bit
RW
RW
(b7-b6)
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
0 : Disable compare match interrupt
1 : Enable compare match interrupt
WKIE
Periodic interrupt triggered every
w eek enable bit
Set to 0 in output compare mode.
Periodic interrupt triggered every
hour enable bit
RW
MNIE
RW



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com