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R8C/2G 数据表(PDF) 216 Page - Renesas Technology Corp

部件名 R8C/2G
功能描述  RENESAS MCU R8C FAMILY / R8C/2x SERIES
PDF  344 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

R8C/2G 数据表(HTML) 216 Page - Renesas Technology Corp

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R8C/2G Group
17. Timers
Rev.1.00
Apr 04, 2008
Page 196 of 318
REJ09B0387-0100
Figure 17.43
Operating Example in Output Compare Mode
2 cycles of maximum count source
00h
Count starts
Time
TSTART bit in
TRECR1 register
1
0
IR bit in
TREIC register
1
0
The above applies under the following conditions.
TOENA bit in TRECR1 register = 1 (enable clock output)
COMIE bit in TRECR2 register = 1 (enable compare match interrupt)
RCS6 to RCS5 bits in TRECSR register = 11b (compare output)
Set to
1 by a program
Set to
0 by acknowledgement of interrupt request
or a program
TREMIN register
setting value
Matched
TREO output
1
0
TCSTF bit in
TRECR1 register
1
0
Output polarity is inverted
when the compare matches
Matched
Matched



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