R8CSLASH2G datasheet(218/344 Pages) RENESAS

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R8C/2G Group

17. Timers

Rev.1.00

Apr 04, 2008

Page 198 of 318

REJ09B0387-0100

Figure 17.44

Setting Example in Real-Time Clock Mode

Stop timer RE operation

TCSTF in

TRECR1 register = 0?

TSTART in TRECR1 register = 0

Setting of registers TRECSR,

TRESEC, TREMIN, TREHR, TREWK,

and bits H12_H24, PM, and INT in

TRECR1 register

Setting of TRECR2 register

TSTART in TRECR1 register = 1

TCSTF in

TRECR1 register = 1?

TREIC register

← 00h

(disable timer RE interrupt)

Setting of TREIC register (IR bit

← 0,

select interrupt priority level)

Select clock output

Select clock source

Seconds, minutes, hours, days of week, operating mode

Set a.m./p.m., interrupt timing

Select interrupt source

Start timer RE operation

TOENA in TRECR1 register = 0

Disable timer RE clock output

(When it is necessary)

TOENA in TRECR1 register = 1

Enable timer RE clock output

(When it is necessary)

TRERST in TRECR1 register = 1

TRERST in TRECR1 register = 0

Timer RE register

and control circuit reset

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