H8SSLASH2225 datasheet(206/1071 Pages) RENESAS

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Section 4 Exception Handling

Rev. 5.00 Aug 08, 2006 page 120 of 982

REJ09B0054-0500

Table 4.2

Exception Handling Vector Table

Exception Source

Vector Number

Vector Address

Advanced Mode*

Power-on reset

H'0000 to H'0003

Manual reset

H'0004 to H'0007

Reserved for system use

H'0008 to H'000B

H'000C to H'000F

H'0010 to H'0013

Trace

H'0014 to H'0017

Direct transitions*

H'0018 to H'001B

External interrupt (NMI)

H'001C to H'001F

Trap instruction (four sources)

H'0020 to H'0023

H'0024 to H'0027

H'0028 to H'002B

H'002C to H'002F

Reserved for system use

H'0030 to H'0033

H'0034 to H'0037

H'0038 to H'003B

H'003C to H'003F

External interrupt

IRQ0

H'0040 to H'0043

IRQ1

H'0044 to H'0047

IRQ2

H'0048 to H'004B

IRQ3

H'004C to H'004F

IRQ4

H'0050 to H'0053

IRQ5

H'0054 to H'0057

IRQ6

H'0058 to H'005B

IRQ7

H'005C to H'005F

Internal interrupt*



123

H'0060 to H'0063



H'01EC to H'01EF

Notes: 1. Lower 16 bits of the address.

2. For details of internal interrupt vectors, see section 5.4.3, Interrupt Exception Handling

Vector Table.

3. For details on direct transitions, see section 24.10, Direct Transitions.

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