CS42324 datasheet(46/71 Pages) CIRRUS

46 / 71 page

DS721A6

CS42324

6. REGISTER DESCRIPTION

All registers are read/write except where otherwise noted. See the following bit definition tables for bit assignment

information. The default state of each bit after release of reset is listed in the shaded row of each bit description

table. When writing to registers containing “Reserved” bits, all bits marked as “Reserved” must maintain their default

values.

6.1

Device I.D. and Revision Register (Address 00h) (Read Only)

6.1.1

Device I.D. (Read Only)

I.D. code for the CS42324.

6.1.2

Chip Revision (Read Only)

CS42324 revision level.

6.2

Mute Control (Address 01h)

6.2.1

System MCLK Source

This bit selects which MCLK pin provides the clock for internal state machines. It must always be set to

whichever clock is currently active.

6.2.2

Mute DAC2 Left-Channel

When set, this bit engages internal mute circuit on DAC2 output.

543

DEVICE3

DEVICE2

DEVICE1

DEVICE0

REV3

REV2

REV1

REV0

DEVICE[3:0]

Device

0110

CS42324

REV[3:0]

Revision Level

000

001

543

Reserved

SYS_MCLK

DAC2_

MuteL

DAC2_

MuteR

DAC1_

MuteL

DAC1_

MuteR

ADC_

MuteL

ADC_

MuteR

SYS_MCLK

System MCLK source

MCLK1

MCLK2

DAC2_MuteL

Mute status of DAC2 Left-channel

Un-muted

1Muted

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