CS42324 datasheet(41/71 Pages) CIRRUS

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DS721A6

CS42324

4.6.2

Software Mode - I²C Control Port

Software Mode is used to access the registers, allowing the CS42324 to be configured for the desired

operational modes and formats. The operation in Software Mode may be completely asynchronous with

respect to the audio sample rates. However, to avoid potential interference problems, the I²C pins should

remain static if no operation is required. Software Mode supports the I²C interface, with the CS42324 act-

ing as a slave device.

SDA is a bidirectional data line. Data is clocked into and out of the part by the clock, SCL. Pin AD0 forms

the least significant bit of the chip address and should be connected through a resistor to VL or GND as

desired. The state of the pin is sensed while the CS42324 is being reset.

The signal timings for a read and write cycle are shown in Figure 20 and Figure 21. A Start condition is

defined as a falling transition of SDA while the clock is high. A Stop condition is a rising transition while

the clock is high. All other transitions of SDA occur while the clock is low. The first byte sent to the

CS42324 after a Start condition consists of a 7-bit chip address field and a R/W bit (high for a read, low

for a write). The upper 5 bits of the 7-bit address field are fixed at 10011. To communicate with a CS42324,

the chip address field, which is the first byte sent to the CS42324, should match 10011 followed by the

settings of AD0. The eighth bit of the address is the R/W bit. If the operation is a write, the next byte is the

Memory Address Pointer (MAP) which selects the register to be read or written. If the operation is a read,

the contents of the register pointed to by the MAP will be output. Setting the auto increment bit in MAP

allows successive reads or writes of consecutive registers. Each byte is separated by an acknowledge

bit. The ACK bit is output from the CS42324 after each input byte is read, and is input to the CS42324

from the microcontroller after each transmitted byte.

Since the read operation can not set the MAP, an aborted write operation is used as a preamble. As

shown in Figure 21, the write operation is aborted after the acknowledge for the MAP byte by sending a

stop condition. The following pseudocode illustrates an aborted write operation followed by a read oper-

ation.

24 25

SCL

CHIP ADDRESS (WRITE)

MAP BYTE

DATA

DATA +1

START

ACK

STOP

ACK

1 AD1 AD0 0

SDA

INCR

16 17 18

10 11

13 14 15

27 28

DATA +n

Figure 20. Software Mode Timing, I²C Write

SCL

CHIP ADDRESS (WRITE)

MAP BYTE

DATA

DATA +1

START

ACK

STOP

ACK

1 AD1 AD0 0

SDA

1 AD1 AD0 1

CHIP ADDRESS (READ)

START

INCR

12 13 14 15

20 21 22 23 24

26 27 28

10 11

17 18

ACK

DATA + n

STOP

Figure 21. Software Mode Timing, I²C Read

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