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CS42324 数据表(PDF) 40 Page - Cirrus Logic

部件名 CS42324
功能描述  10-In, 6-Out, 2 Vrms Audio CODEC
PDF  71 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS42324 数据表(HTML) 40 Page - Cirrus Logic

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DS721A6
CS42324
4.6
Device Control
In Software Mode, all functions and features may be controlled either by two-wire I²C or SPI Software Mode
interface. In Hardware Mode, a limited feature set may be controlled via hardware control pins.
4.6.1
Hardware Mode
A limited feature-set is available when the CS42324 powers up in Hardware Mode (see “Recommended
Power-Up Sequence, Hardware Mode” on page 38) and may be controlled via hardware control pins.
Table 9 shows a list of functions/features, the default configuration and the associated hardware control
available.
Hardware Mode Feature Summary
Feature/Function
Default Configuration
Hardware Control
Power Control
ADC
DAC1
DAC2
Powered Up
Powered Up
Powered Up
-
-
-
SP_ERROR
Enabled; Active low, open drain
-
Auto Detect
Enabled
(256x/128xFs, 512x/256xFs only)
-
Serial Port Master/Slave and Speed Mode
(Selectable)
“M0” and “M1”, pins 1 and 2
(see page 29)
Async / Sync Mode
Synchronous only
-
MCLK Divide
(Selectable)
“MDIV” pin 3
(see page 30)
Serial Port Interface Format
Serial Port 1
Serial Port 2
(Selectable)
“DIF” pin 5
(see page 32)
Freeze Bit Settings
Disabled
-
ADC Volume & Gain
Soft Ramp
Zero Cross
Mute
Invert
Volume
Enabled
Disabled
Disabled
Disabled
0 dB
-
-
-
-
-
ADC High-Pass Filter
ADC High-Pass Filter Freeze
Enabled
Continuous DC Subtraction
-
-
AIN Input Select to ADC
(SDOUT source)
AIN1
-
DAC1 & DAC2 Volume & Gain
Soft Ramp
Zero Cross
Mute
Invert
Mixer
Volume
Enabled
Disabled
Disabled
Disabled
Disabled (‘00’)
0 dB
-
-
-
-
-
-
DAC1 & DAC2 De-Emphasis
Disabled
-
AOUT1x
source
Output of DAC1
-
AOUT2x
source
Output of DAC2
-
AOUT3x
source
AIN1x
-
AOUTxx
MUTE
(Selectable)
MUTE pin 4
(see page 37)
Table 9. Hardware Mode Feature Summary



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