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CS42324 数据表(PDF) 51 Page - Cirrus Logic

部件名 CS42324
功能描述  10-In, 6-Out, 2 Vrms Audio CODEC
PDF  71 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS42324 数据表(HTML) 51 Page - Cirrus Logic

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DS721A6
51
CS42324
6.6.2
ADC Serial Port Source
This bit selects which serial port provides the sub clocks for the ADC.
6.6.3
ADC Digital Interface Format (ADC_DIF)
These bits configure the serial audio interface format for transmitting digital audio data on SDOUT
6.7
DAC1 Clocking (Address 07h)
6.7.1
DAC1 MCLK Source
This bit selects which MCLK pin provides the clock for DAC1.
6.7.2
DAC1 Serial Port Source
This bit selects which serial port provides the sub clocks for the DAC1.
6.7.3
DAC1 Digital Interface Format (DAC1_DIF)
These bits configure the serial audio interface format for incoming digital audio data on SDIN1.
ADC_SP
ADC sub clock source
0
Serial Port 1 (SCLK1/LRCK1)
1
Serial Port 2 (SCLK2/LRCK2)
ADC_DIF[1:0]
ADC Serial Audio Interface Format
00
Left-Justified, 24-bit data
01
I²S, 24-bit data
10
Reserved
11
Reserved
7
6
5
432
10
Reserved
DAC1_MCLK
Reserved
DAC1_SP
Reserved
Reserved
DAC1_DIF1
DAC1_DIF0
DAC1_MCLK
DAC1 MCLK source
0
MCLK1
1MCLK2
DAC1_SP
DAC1 sub clock source
0
Serial Port 1 (SCLK1/LRCK1)
1
Serial Port 2 (SCLK2/LRCK2)
DAC1_DIF[1:0]
DAC1 Serial Audio Interface Format
00
Left-Justified, up to 24-bit data
01
I²S, up to 24-bit data
10
Right Justified, 16-bit data
11
Right Justified, 24-bit data



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