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CS42324 数据表(PDF) 56 Page - Cirrus Logic |
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CS42324 数据表(HTML) 56 Page - Cirrus Logic |
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56 / 71 page ![]() 56 DS721A6 CS42324 6.11.5 DAC2 Loop-Back Loops ADC SDOUT, SCLK, and LRCK to DAC1 serial port pins. 6.11.6 DAC2 Invert Signal Polarity When enabled, this bit will effect a 180 degree phase shift in the DAC2 channels. 6.11.7 DAC2 Channel Mixer These bits implements mono mixes of the left and right channels as well as a left/right channel swap. 6.12 AOUT1 Control (Address 0Dh) 6.12.1 External Mute Control Pin This bit controls the logic state of the corresponding MUTEC1 pin. Though this bit is active high, it should be noted that the MUTEC1 pin is active low. 6.12.2 AOUT1 Select These bits are used to select the analog output source. DAC2_LOOP_ BACK DAC2 Loop-Back 0 Off 1 On DAC2_INV DAC2 Invert Signal Polarity 0 Off 1 On DAC2_MIX[1:0] DAC2 OUTA DAC2 OUTB 00 L R 01 10 11 R L 76 543 21 0 Reserved Reserved Reserved Reserved MUTEC1 AOUT1_SEL2 AOUT1_SEL1 AOUT1_SEL0 MUTEC1 Output on MUTEC1 pin 0 High (Mute Disengaged) 1 Low (Mute Engaged) AOUT1_SEL[2:0] AOUT1 Source 000 Reserved 001 AIN Pair 1 010 AIN Pair 2 011 AIN Pair 3 100 AIN Pair 4 101 AIN Pair 5 110 DAC1 Output Pair 111 DAC2 Output Pair LR + 2 ----------- LR + 2 ----------- |
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