MC68HC705P9CS datasheet(108/160 Pages) FREESCALE

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Timer

Technical Data

MC68HC705P9 — Rev. 4.0

108

Timer

MOTOROLA

9.6 Interrupts

The following timer sources can generate interrupts:

•

Input capture flag (ICF) — The ICF bit is set when an edge of the

selected polarity occurs on the input capture pin. The input

capture interrupt enable bit, ICIE, enables ICF interrupt requests.

•

Output compare flag (OCF) — The OCF bit is set when the

counter value matches the value written in the output compare

registers. The output compare interrupt enable bit, OCIE, enables

OCF interrupt requests.

•

Timer overflow flag (TOF) — The TOF bit is set when the counter

value rolls over from $FFFF to $0000. The timer overflow enable

bit (TOIE) enables timer overflow interrupt requests.

Table 9-3 summarizes the timer interrupt sources.

9.7 I/O Registers

The following registers control and monitor the operation of the timer:

•

Timer control register (TCR)

•

Timer status register (TSR)

•

Timer registers (TRH and TRL)

•

Alternate timer registers (ATRH and ATRL)

•

Input capture registers (ICRH and ICRL)

•

Output compare registers (OCRH and OCRL)

Table 9-3. Timer Interrupt Sources

Source

Local Mask

Global

Mask

Priority

(1 = Highest)

ICF Bit

OCF Bit

TOF Bit

ICIE Bit

OCIE Bit

TOIE Bit

I Bit

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