MC68HC705P9CS datasheet(113/160 Pages) FREESCALE

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Timer

I/O Registers

MC68HC705P9 — Rev. 4.0

Technical Data

MOTOROLA

Timer

113

9.7.4 Alternate Timer Registers

The read-only alternate timer registers (ATRH and ATRL) contain the

current high and low bytes of the 16-bit counter. Reading ATRH before

reading ATRL causes ATRL to be latched until ATRL is read. Reading

does not affect the timer overflow flag (TOF). Writing to the alternate

timer registers has no effect.

Reading ATRH returns the current value of the high byte of the counter

and causes the low byte to be latched into a buffer.

Figure 9-15. Alternate Timer Register Reads

NOTE:

To prevent interrupts between readings of ATRH and ATRL, set the

interrupt mask (I bit) in the condition code register before reading ATRH,

and clear the mask after reading ATRL.

$001A

Bit 7

54321

Bit 0

Read:

Bit 15

Bit 8

Write:

Reset:

Reset initializes ATRH to $FF

$001B

Bit 7

54321

Bit 0

Read:

Bit 7

54321

Bit 0

Write:

Reset:

Reset initializes ATRL to $FC

= Unimplemented

Figure 9-14. Alternate Timer Registers (ATRH and ATRL)

ATRH ($001A)

ATRL ($001B)

BUFFER

INTERNAL

DATA BUS

READ ATRH

LATCH

Freescale Semiconductor, Inc.

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