910GL datasheet(178/426 Pages) INTEL

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Integrated Graphics Device Registers (D2:F0)

(Intel® 82915G/82915GV/82915GL/ 82910GL GMCH Only)

178

Datasheet

9.1.5

RID2—Revision Identification (D2:F0)

PCI Device:

Address Offset:

08h

Default Value:

See bit description

Access:

Size:

8 bits

This register contains the revision number for Device 2 Functions 0 and 1

Bit

Access &

Default

Description

7:0

00h

Revision Identification Number (RID): This field indicates the number of times

that this device in this component has been “stepped” through the manufacturing

process. Refer to the Intel

® 82915G/82915P/82915GV/82910GL Express

Chipset Specification Update for the value of the Revision ID Register.

9.1.6

CC—Class Code (D2:F0)

PCI Device:

Address Offset:

09h

Default Value:

030000h

Access:

Size:

24 bits

This register contains the device programming interface information related to the Sub-Class

Code and Base Class Code definition for the IGD. This register also contains the Base Class Code

and the function sub-class in relation to the Base Class Code.

Bit

Access &

Default

Description

23:16

03h

Base Class Code (BCC). This is an 8-bit value that indicates the base class

code for the GMCH.

03h = Display Controller.

15:8

00h

Sub-Class Code (SUBCC): Value will be determined based on Device 0 GGC

00h = VGA compatible

80h = Non VGA

7:0

00 h

Programming Interface (PI)

00h = Hardwired as a Display controller.

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