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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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910GL 数据表(PDF) 187 Page - Intel Corporation |
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910GL 数据表(HTML) 187 Page - Intel Corporation |
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187 / 426 page  Integrated Graphics Device Registers (D2:F0) (Intel® 82915G/82915GV/82915GL/ 82910GL GMCH Only) R Datasheet 187 9.1.24 MGGC—Mirror of Dev0 GMCH Graphics Control (D2:F0) (Mirrored_D0_52) PCI Device: 2 Function: 0 Address Offset: 52h Size: 16 bits This register is a Read-Only copy of Device 0, Offset 52h register. 9.1.25 MDEVENdev0f0—Mirror of Dev0 Device Enable (D2:F0) (Mirrored_D0_54) PCI Device: 2 Function: 0 Address Offset: 54h Size: 32 bits This register is a Read-Only copy of Device 0, Offset 54h register. 9.1.26 BSM—Base of Stolen Memory (D2:F0) PCI Device: 2 Address Offset: 5Ch Default Value: 07800000h Access: RO Size: 32 bits Graphics Stolen Memory and TSEG are within DRAM space defined under TOLUD. From the top of low used DRAM, GMCH claims 1 to 64 MBs of DRAM for internal graphics, if enabled. Bit Access & Default Description 31:20 RO 078h Base of Stolen Memory (BSM): This register contains bits 31:20 of the base address of stolen DRAM memory. The host interface determines the base of Graphics Stolen memory by subtracting the graphics stolen memory size from TOLUD. See Device 0 TOLUD for more explanation. 19:0 Reserved |
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