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910GL 数据表(PDF) 193 Page - Intel Corporation |
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910GL 数据表(HTML) 193 Page - Intel Corporation |
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193 / 426 page  Device 2 Function 1 (D2:F1) Configuration Registers (Intel® 82915G/82915GV/82915GL/ 82910GL Only) R Datasheet 193 10 Device 2 Function 1 (D2:F1) Configuration Registers (Intel ® 82915G/82915GV/82915GL/ 82910GL Only) Table 10-1. Device 2 Function 1 Register Address Map Summary Address Offset Register Symbol Register Name Default Value Access 00–01h VID2 Vendor Identification 8086h RO 02–03h DID2 Device Identification 2780h RO 04–05h PCICMD2 PCI Command 0000h RO, R/W 06–07h PCISTS2 PCI Status 0090h RO 08h RID2 Revision Identification See register description RO 09–0Bh CC Class Code Register 03800h RO 0Ch CLS Cache Line Size 00h RO 0Dh MLT2 Master Latency Timer 00h RO 0Eh HDR2 Header Type Register 80h RO 0Fh — Reserved — — 10–13h MMADR Memory Mapped Range Address 00000000h RO, R/W 14–2Bh — Reserved — — 2C–2Dh SVID2 Subsystem Vendor Identification 0000h R/WO 2E–2Fh SID2 Subsystem Identification 0000h R/WO 30–33h ROMADR Video BIOS ROM Base Address 00000000h RO 34h CAPPOINT Capabilities Pointer D0h RO 35–3Dh — Reserved — — 3Eh MINGNT Minimum Grant Register 00h RO 3Fh MAXLAT Maximum Latency 00h RO 40–43h — Reserved — — 44h MCAPPTR Mirror of Dev0 Capability Pointer 45–47h — Reserved — — |
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