ADP1046ACPZ-R7 datasheet(43/96 Pages) AD

43 / 96 page

Data Sheet

ADP1046

Rev. 0 | Page 43 of 96

SAVING REGISTER SETTINGS TO THE EEPROM

The register settings cannot be saved to the factory default set-

tings located in Page 0 of the EEPROM main block. This is to

prevent the user from accidentally overriding the factory trim

settings and default register settings.

Save Register Settings to User Settings

The register settings can be saved to the user settings located in

Page 1 of the EEPROM main block using the STORE_USER_ALL

command (Register 0x82). Before this command can be executed,

the EEPROM must first be unlocked for writing (see the Unlock

the EEPROM section).

After the register settings are saved to the user settings, any

subsequent power cycle automatically downloads the latest

stored user information from the EEPROM into the internal

registers.

Note that execution of the STORE_USER_ALL command auto-

matically performs a page erase to Page 1 of the EEPROM main

block, after which the register settings are stored in the EEPROM.

Therefore, it is important to wait at least 40 ms for the operation

to complete before executing the next I2C command.

EEPROM CRC CHECKSUM

As a simple method of checking that the values downloaded

from the EEPROM are consistent with the internal registers,

a CRC checksum is implemented.



When the data from the internal registers is saved to the

EEPROM (Page 1 of the main block), the total number

of 1s from all the registers is counted and written into the

EEPROM as the last byte of information. This is called

the CRC checksum.



When the data is downloaded from the EEPROM into the

internal registers, a similar counter that sums all 1s from

the values loaded into the registers is saved. This value is

compared with the CRC checksum from the previous

upload operation.

If the values match, the download operation was successful. If

the values differ, the EEPROM download operation failed, and

the EEPROM CRC fault flag is set (Bit 1 of Register 0x03).

To read the EEPROM CRC checksum value, execute the

EEPROM_CRC_CHKSUM command (Register 0x84).

This command returns the CRC checksum accumulated in

the counter during the download operation.

Note that the CRC checksum is an 8-bit cyclical accumulator

that wraps around to 0 when 255 is reached.

ADP1046ACPZ-R7 数据表(PDF) 43 Page - Analog Devices

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