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ADP1046ACPZ-R7 数据表(PDF) 81 Page - Analog Devices |
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ADP1046ACPZ-R7 数据表(HTML) 81 Page - Analog Devices |
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81 / 96 page ![]() Data Sheet ADP1046 Rev. 0 | Page 81 of 96 EXTENDED FUNCTIONS REGISTERS Table 117. Register 0x75—Voltage Line Feedforward Bits Bit Name R/W Description [7:4] Reserved R/W Reserved. 3 Disable feedforward during soft start R/W If voltage line feedforward is enabled, this bit disables it during the reference ramp-up (soft start). This operation is gated by the filter GO bit (Register 0x7F[3]). 0 = feedforward enabled during soft start (recommended setting). 1 = feedforward disabled during soft start. 2 Feedforward enable R/W This bit enables the voltage line feedforward loop. This operation is gated by the filter GO bit (Register 0x7F[3]). 0 = feedforward disabled. 1 = feedforward enabled. These bits set the gain for the voltage feedforward function. Bit 1 Bit 0 Gain 0 0 1 0 1 0.875 1 0 0.75 [1:0] Gain setting R/W 1 1 0.5 Table 118. Register 0x76—Volt-Second Balance Settings (OUTA and OUTB Pins) Bits Bit Name R/W Description 7 Modulate enable, t1 R/W Setting this bit enables modulation from balance control on the OUTA rising edge, t1. 6 t1 sign R/W 0 = positive sign. Increase of balance control modulation moves t1 right. 1 = negative sign. Increase of balance control modulation moves t1 left. 5 Modulate enable, t2 R/W Setting this bit enables modulation from balance control on the OUTA falling edge, t2. 4 t2 sign R/W 0 = positive sign. Increase of balance control modulation moves t2 right. 1 = negative sign. Increase of balance control modulation moves t2 left. 3 Modulate enable, t3 R/W Setting this bit enables modulation from balance control on the OUTB rising edge, t3. 2 t3 sign R/W 0 = positive sign. Increase of balance control modulation moves t3 right. 1 = negative sign. Increase of balance control modulation moves t3 left. 1 Modulate enable, t4 R/W Setting this bit enables modulation from balance control on the OUTB falling edge, t4. 0 t4 sign R/W 0 = positive sign. Increase of balance control modulation moves t4 right. 1 = negative sign. Increase of balance control modulation moves t4 left. Table 119. Register 0x77—Volt-Second Balance Settings (OUTC and OUTD Pins) Bits Bit Name R/W Description 7 Modulate enable, t5 R/W Setting this bit enables modulation from balance control on the OUTC rising edge, t5. 6 t5 sign R/W 0 = positive sign. Increase of balance control modulation moves t5 right. 1 = negative sign. Increase of balance control modulation moves t5 left. 5 Modulate enable, t6 R/W Setting this bit enables modulation from balance control on the OUTC falling edge, t6. 4 t6 sign R/W 0 = positive sign. Increase of balance control modulation moves t6 right. 1 = negative sign. Increase of balance control modulation moves t6 left. 3 Modulate enable, t7 R/W Setting this bit enables modulation from balance control on the OUTD rising edge, t7. 2 t7 sign R/W 0 = positive sign. Increase of balance control modulation moves t7 right. 1 = negative sign. Increase of balance control modulation moves t7 left. 1 Modulate enable, t8 R/W Setting this bit enables modulation from balance control on the OUTD falling edge, t8. 0 t8 sign R/W 0 = positive sign. Increase of balance control modulation moves t8 right. 1 = negative sign. Increase of balance control modulation moves t8 left. |
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