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ST7MC1 数据表(PDF) 202 Page - STMicroelectronics |
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ST7MC1 数据表(HTML) 202 Page - STMicroelectronics |
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202 / 308 page ![]() ST7MC1/ST7MC2 202/308 MOTOR CONTROLLER (Cont’d) ■ Edge-aligned Mode (CMS bit = 0) In this operating mode, the PWM Counter counts up to the value loaded in the 12-bit Compare Reg- ister. Then the PWM Counter is cleared and it re- starts counting up. The PWM signals are set to ‘0’ when the PWM Counter reaches, in up-counting, the correspond- ing 13-bit Compare register value and they are set to ‘1’ when the PWM Counter is cleared. If the 13-bit Compare register value is greater than the extended Compare 0 register (the 13th bit is set to ‘0’), the corresponding PWM output signal is held at ‘1’. If the 13-bit Compare register value = 0, the corre- sponding PWM output signal is held at ‘0’. Figure 120 shows some edge-aligned PWM wave- forms in an example where the Compare 0 register value = 8. Figure 120. Edge-aligned PWM Waveforms (Compare 0 Register = 8) 012345678 01 1 2 3‘1’ 4‘0’ 1 Compare Register value = 4 2 Compare Register value = 8 3 Compare Register value > 8 4 Compare Register value = 0 1 |
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