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PPC34C60 数据表(PDF) 57 Page - SMSC Corporation

部件名 PPC34C60
功能描述  PARALLEL PORT INTERFACE CHIP PERIPHERAL SIDE
PDF  58 Pages
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制造商  SMSC [SMSC Corporation]
网页  http://www.smsc.com
标志 SMSC - SMSC Corporation

PPC34C60 数据表(HTML) 57 Page - SMSC Corporation

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SMSC DS – PPC34C60
Page 57
Rev. 06/01/2001
ADVANCED INFORMATION
8.1 DMA Transfer Cycle Timing
DMA TRANSFER TYPE (PERIPHERAL BUS
<--> DRAM)
DMA TRANSFER CYCLE
DMA TRANSFER RATE
PERIPHERAL BUS
WIDTH
DRAM WIDTH
8
8
1,333
[16 BCLK]
750 KB/S
8
4
1,583
[19 BCLK]
631,578 KB/S
16
16
1,333
[16 BCLK]
1.5 MB/S
16
8
1,583
[19 BCLK]
1.263 MB/S
16
4
2,083
[25 BCLK]
960 KB/S
FIGURE 28 – RESET TIMING
PARAMETER
MIN
TYP
MAX
UNITS
t1
Reset pulse width
84
[2 SCLK]
ns
FIGURE 29 - CLOCK TIMING
PARAMETER
MIN
TYP
MAX
UNITS
t1
Clock Period (max SCLK=25MHz)
40
41.67
ns
t2
Clock active high or low
14
ns
tr
Clock Rise time (Vin = 0.4 to 3.0 V)
5
ns
tf
Clock Fall time (Vin = 3.0 to 0.4 V)
5
ns
nRESET
t1
t1
t2
t2
XIN (SCLK)



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