数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

PPC34C60 数据表(PDF) 10 Page - SMSC Corporation

部件名 PPC34C60
功能描述  PARALLEL PORT INTERFACE CHIP PERIPHERAL SIDE
PDF  58 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  SMSC [SMSC Corporation]
网页  http://www.smsc.com
标志 SMSC - SMSC Corporation

PPC34C60 数据表(HTML) 10 Page - SMSC Corporation

Back Button PPC34C60 Datasheet HTML 6Page - SMSC Corporation PPC34C60 Datasheet HTML 7Page - SMSC Corporation PPC34C60 Datasheet HTML 8Page - SMSC Corporation PPC34C60 Datasheet HTML 9Page - SMSC Corporation PPC34C60 Datasheet HTML 10Page - SMSC Corporation PPC34C60 Datasheet HTML 11Page - SMSC Corporation PPC34C60 Datasheet HTML 12Page - SMSC Corporation PPC34C60 Datasheet HTML 13Page - SMSC Corporation PPC34C60 Datasheet HTML 14Page - SMSC Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 58 page
background image
SMSC DS – PPC34C60
Page 10
Rev. 06/01/2001
ADVANCED INFORMATION
DESCRIPTION OF PIN FUNCTIONS
PIN NO.
NAME
SYMBOL
BUFFER
TYPE
DESCRIPTION
49
Selected Device
SLCTD
O8
This signal is an active high output that
indicates that the device is the active
device on the daisy chain. This may be
used for debug purposes, to enable
drivers, or to qualify signals.
50
nProduct ID
PID
O8
This signal is an active low output
asserted when the host performs a
request for the peripheral's Product ID.
This function is used by the daisy chain
and multiplexor protocols.
33
Sense VCC
SENSE
I, PD
When pulled high, this input will enable all
output drivers of the PPC34C60. When
low, all outputs are tri-stated.
This
resolves
the
back-power
problem
inherent in parallel port peripherals.
Isolate the chip's VCC from the rest of
the peripheral's VCC using a schottky
diode. The SENSE input should be tied
to the peripheral's VCC and the anode of
the diode.
In this manner, when the
peripheral's power is off, the sense input
will shut down all outputs, preventing the
chip from driving into a low impedance
load and consequently damaging the
chip's input protection diodes.
100
Test Counters
TEST
I, PD
This is an active high signal that allows
access to some large counter chains that
are normally buried within the chip. For
normal operation this input should be left
unconnected, or tied to ground. For more
information on the test mode contact the
factory.
98
BUSCLK
BCLK
O8
BUSCLK is the SCLK divided by the
value programmed in the Configuration
Register.
99
Reserved
RESERVED
Leave floating, no connection
9,21,
41,60,
72,90
Power
VCC
+5 Volt supply pins.
10,22,
40,59,
71,91
Ground
GND
Ground pins
Note 1: By pulling both these lines low (illegal state), the PPC34C60's output ports can be disabled.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com